I have a machine with a ControlLogix Processor. The program was
converted from a PLC5. In 1 section in rung 1 is a piece of logic
with an (U) unlatch output bit. During the issue this rung appears to stay false.
In rung 7 is logic and is always in the true state. it has the (L) latch output.
Rung 8 has logic that appears to be always true and it also has a (U)
unlatch output. My issue is randomly and very quickly the Latch is
toggling on. Can this arrangement of the 2 (U) unlatch bits cause this
issue. The only way I could see this was on a trend it is so fast
and random.
converted from a PLC5. In 1 section in rung 1 is a piece of logic
with an (U) unlatch output bit. During the issue this rung appears to stay false.
In rung 7 is logic and is always in the true state. it has the (L) latch output.
Rung 8 has logic that appears to be always true and it also has a (U)
unlatch output. My issue is randomly and very quickly the Latch is
toggling on. Can this arrangement of the 2 (U) unlatch bits cause this
issue. The only way I could see this was on a trend it is so fast
and random.