Signle block download

Hi guys,

I think that i am missing something here...

I have a S7-1516-3 CPU (firmware v1.85) which i program with TIA portal v14.

When i have a change in two blocks, for example two FC's, I can not find a way to just download 1 of the two changes.

When comparing online/offline there is the possibility to choose a action per block. But in the load preview it always says "Overwrite" for both blocks and I cannot change that.

I just cant find a way to just download 1 single changes block....

Does anyone have any experience, i refuse to believe that this isn't possible.

Right click in the block and select download.

janner_10 said:

Right click in the block and select download.

Click to expand...

That is exactly how I want to do it, just like in step 7.
But in the load preview it still want to download both blocks.



like in the picture below
http://imgur.com/a/5mk6y

As far as I know, it isn't possible. In the 1500, all downloads are "consistent downloads", where it compiles the project and then downloads the whole thing, or at least anything that is different from what is currently there. My guess is that this is at least in part because of the way the optimized code works, it needs everything to be compiled together or else it won't work.

I think it IS possible to upload individual blocks via the online/offline view. If you only want to download the one FC, you could upload the other one first.

Why do you want to download one FC but not the other?

Of course there can be a need for testing program changes one-by-one.
But I have also found that TIA requires that all blocks be downloaded.
I dont think it has to do with optimized access. I never use block optimisation, and I have the same problem.
I think that the technical argument is that if an FC or FB is changed, then the call of that FC or FB must also be updated, so the calling block will also be downloaded. And if that means that there are also calls to other modified blocks from the same location, then the logic says these have to be downloaded too.

JesperMP said:

I dont think it has to do with optimized access. I never use block optimisation, and I have the same problem.

Click to expand...

Oh, I just meant that the possibility of optimization is maybe what made it a requirement all the time.

As an aside, do you really never use optimized blocks? It's the default, and I hardly ever have a need to turn it off. What's the downside you see, do you prefer the absolute addressing to symbolic?

@mk42.

No I certainly do not prefer absolute addressing.
But I use the "AT" view a lot. Also directly in FBs (*). Awesome when you get the gist of it. For that to work you need to deselect optimised addressing.
Also, I use array tags quite a bit with my HMIs.
And we have a bit of OPC DA which also doesnt work with optimised addresses.

I see it the other way around, what is the advantage of optimised addressing, apart from a minor memory size advantage (which as quite irrelevant with the huge amounts of memory the CPUs have these days) ?

*: Example. I have made my own state machines. For every transition, I have to reset all the state bits and set the one state bit that becomes active. (I could chose to merely reset the active state bit, but to be super-sure that there are never more than 1 state active at any time, I reset all state bits).
So I need single bools for all the states, but also an INT, DINT or LINT for all the state bits when I want to reset them easily in one go. That is where AT is handy, to have several "views" of the same data.
In STEP7 classic I would have had to use absolute addressing, or program the state machine in SCL (which support AT), or resort to pointers (which I by principle avoid if possible).
In STEP7 TIA I can do the same in ladder with no fuss.

We also asked Siemens Technical support explain if it is still possible or not, but they haven't answered yet.
So I will post there answer here later on.

But if it isn't possible then I don't understand why they have the "Action" option in the compare function. (maybe only for S7-300/400's)

On other brands, like Mitsubishi Q series, you also have to compile all changes but you still have the option to download a single change/block.

I could also think that it is a global option that only fully compiled programs can be downloaded. Or that is has something to do with the optimized addressing, but i can't find any explanation in the Siemens forums or documentation.

jochemoijen said:

But if it isn't possible then I don't understand why they have the "Action" option in the compare function. (maybe only for S7-300/400's)

Click to expand...

I think 300/400 may be a big part of the answer, but I'll also say that I'm pretty sure you CAN do individual block uploads. The trick is that you can't do uploads and downloads at the same time via that comparison interface. I do my uploads first, then download the whole thing.

It seems silly that you CAN'T do individual block downloads, somehow, but maybe that's just the designer's mindset of THIS IS HOW YOU SHOULD PROGRAM. All too common, unfortunately. Sometimes Siemens gives you a million tools and options (S5 timers still, really?), but other times you must follow the ONE TRUE PATH.

JesperMP said:

I see it the other way around, what is the advantage of optimised addressing, apart from a minor memory size advantage (which as quite irrelevant with the huge amounts of memory the CPUs have these days)?

Click to expand...

Fair question. When I think about it, I think I just started drinking the kool-aid day one, and thought it was pretty tasty. I just kinda went with the official best practices, because the rest of the editor fixed so many of my pet peeves (and admittedly created new ones, like the subject of this thread). That's why I was curious when you said you don't optimize. You seem on board with a lot of the new HW, so I was wondering why you skipped that new feature. Makes sense though.

AT is useful, but I've only really ever used it for ANY pointers. I've never needed it in the new gen PLCs. I either solved the problem another way, or it would have confused whoever got the code.

I'd be curious to see which features I'm using that actually require optimized vs were merely introduced at the same time: things like indirect addressing via LAD, slice addressing, etc.

The only big benefit I specifically recall (besides hypothetical performance enhancements), was the download without re-initialization feature. It's a huge pain, and I never use it. Needs to be activated and downloaded BEFORE you need it, and it means you can't go back and edit what's already there. Other than that, you can set retentivity at a tag level instead of at a block level, but that's more of a convenience more than anything else.

JesperMP said:

@mk42.

I see it the other way around, what is the advantage of optimised addressing, apart from a minor memory size advantage (which as quite irrelevant with the huge amounts of memory the CPUs have these days) ?

Click to expand...

I don't think that true according to Siemens it is not just memory it also impacts performance in various ways especially in the 1500 series.

The new 1500 series (Not sure about 1200) use Intel endianness but not optimized you force it back into Motorola endianness.

Siemens told me that all variables gets byte swapped runtime if not optimized and also some variables like booleans are handled in a more efficient way if optimized so it should also impact performance.

I also guess that it impacts communications between HMI and PLC since the protocol has been changed for optimized blocks.

On your imgur picture, what happens when you deselect the overwrite checkbox on one FC, and then click Load. Does is still want to load both FC's?

fredz0003 said:

On your imgur picture, what happens when you deselect the overwrite checkbox on one FC, and then click Load. Does is still want to load both FC's?

Click to expand...

That's the strange part, the cehckboxes are disabled so I cant change them...

jochemoijen said:

That's the strange part, the cehckboxes are disabled so I cant change them...

Click to expand...

Ok sorry I mainly use old step7. I did run a quick test on TIA portal and it beats me why they have done that. I modified two FC's which are independent of each other and still wants to download both.

Can't wait to move to TIA !

My only suggestion is two keep one Master where you change the one you will be downloading, and keep one working version where you can work on it on the side without downloading.

Once you are ready to download just copy and paste on the master project, I hope that works fine and TIA portal doesn't throw a fit.

fredz0003 said:

Ok sorry I mainly use old step7. I did run a quick test on TIA portal and it beats me why they have done that. I modified two FC's which are independent of each other and still wants to download both.

Can't wait to move to TIA !

My only suggestion is two keep one Master where you change the one you will be downloading, and keep one working version where you can work on it on the side without downloading.

Once you are ready to download just copy and paste on the master project, I hope that works fine and TIA portal doesn't throw a fit.

Click to expand...

It should let you download only certain blocks to a 300/400, but the default is to download everything.

If you're trying to keep track of multiple versions of blocks, this is where the project library can come in really handy. It lets you apply version control to your blocks, and keep past versions if you choose. If you had the PLCs original project, you could make the updates you want to out of the library, without having to update everything.

mk42 that is a valuable lesson, I guess for the PLC's that TIA thinks of as consistent download or safety PLC's you have to download all at once. For the blocks that don't need to be downloaded to the working memory of the CPU, perhaps the best/only solution is to version the block in a project library or global library depending on the blocks function. Always learning in this business

The versioning of the blocks is nice, well on old step7 our engineers just kept a log of the version changes this is just a nice feature.