Masked Moves

ScottC

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Join Date
Jul 2003
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Phoenix
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29
Hi all, I am trying to figure out a mask value and RSLogix keeps changing it to a -1. Basically, I am looking at I 3.0 ( All 16 inputs)and they must all be true during a test. I want to use the mask of FFFFh and when I do, RSL returns a -1. If they are all true, the value of FFFF should be moved to a location and compared in a NEQ test. If the value is NOT FFFF, a fault will be set. This basically checks that all the 16 inputs are true. Correct?
The idea here is that should any one of the inputs stay low, a bad part is detected. Actually, only the first 10 inputs are for the test and that previously had a mask of 3ffh (1023). The remaining inputs are to show the parts are clamped and they will have to be, so I see no harm in using them as well. This entire problem arises because the logic was originally written to read I3.0, mask thru 3FFh, and compare to a zero. This was based on ANY of the first 10 inputs coming on, a bad part is detected via a N.O. Pressure switch(Part does not have a hole). Now, we have switched to a flow switch that is N.O. and will give the input in the event of a good part (one that flows air because the hole is completed). Well, the logic was written to require no inputs for a pass test. Now I need to change it to see all inputs for a pass test. I hope that tells everyone enough about the application. BTW, this is for detection of an oil hole that is drilled in a sun gear in GM's HD 4 speed auto tranny in case anyone is interested.
Thanks in advance for any help,
Scott
 
Thanks, you guys. And Gerry, what a great idea, just finished incorporating that into my ladder. Just need to add a short delay now and this little bit of programming should be complete! (Famous last words eh?)

Scott
 
WHY

I know this is probably one of thoughs well šŸ™ƒ questions,
but why is FFFFh = -1 in a processor. I know it is just don`t understand WHY!


:site:
 
The regsiters in this particular processor are 16 bits wide. This could represent 0 to 65535 (expressed in decimal). If they wish to interpret it as holding positive or negative numbers then half of the available positions must stand for negative numbers. They accomplish this by using the most significant bit as a sign bit. It's kind of opposite of what you would expect though. If it is a zero then the number (0 to 32767) is positive. If it's a one then the number is negative.

Now you would naturally think that, if it is a negative number, then just changing the most significan bit to zero would give you the equivalent positive number, but it doesn't work like that.

The negative number has to be expressed in such a way that, when added to a positive number, the result comes out right (that is a smaller positive number or perhaps even a negative number). The negative number is actually the result of the operation 'zero minus the positive number'. Its in a form clled the 'twos complement'. What's nice is that the signed math comes out correctly.

So your FFFFh sets the top bit to one resulting in a negative number. Try subtracting one from zzero in binary (doaing a borrow of course) and see what you get. That's why the negative one.
 
As a side note...

There are many in this forum that may correct this, but I think the reason the whole 2's compliment thing works is based on how the CPU processes numbers.

Think of the range of numbers from 0 - 65535 as a circle with 0 and 65535 touching each other at 12 o'clock, incrementing as you go clockwise. Now, think of CPU adds and subtracts as arc-length moves around this circle. 16364 is at 3 o'clock. Adding 16384 and 16384 gives you 32768, which is at 6 o'clock. Or, it is a 1/4-circle arc-length move starting at the 1/4-circle point, putting you at the 1/2 circle position.

Now, lets try and go the other way. We start at 0 and subtract 16384. That is a counterclockwise 1/4-circle move that ends us at the 3/4 circle point. You intuitively know this is a negative number (-16384). But to the CPU it could just as easily be a positive number (49152). First of all, you need to notice that the only reason that the number is -16384 is that you choose to look at it as -16384. The bit pattern just as correctly indicates 49152. All the CPU is doing to get the add is performing some simple logical relationships between the bits to get the new result. If the result needs more bits than available, the most significant bit is lost and the rest are kept, thus the number circle.

Now let's take -16384 and add 32768 to it. As we saw before 32768 is equivalent to a 1/2 circle arc-length. So if we move from -16384 (3/4 circle point) clockwise (because it is an add) a distance of 1/2 circle we end up at the 1/4 circle point, which is the same as 16384. You will also note that -16384 + 32786 = 16384.

So we can see that the magnitude works out correctly if we move the correct distance around out number circle in the appropriate direction. But now how do we display this. That's where two's complement comes in. We need to be able to separate the magnitude and the sign. We know the sign because, since we choose to look at this as a signed number the most significant bit (bit 15) determines the sign (1 -> negative, 0 -> positive). Two's complement simply inverts all the bits and adds 1 to the result (as shown on this webpage).

I hope this helps more than confuses the issue.
Keith
 
Greetings Tracy,

if you've already got what you need, then don't let me confuse you ... but ...

this is one of those (many) subjects where there are a LOT of different ways of looking at it ... with that in mind, here's yet another post which you might find helpful ... in fact, I'd suggest that you read the whole thread ... sometimes one slight difference in the explanation will make the light bulb come on ...
 

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