SLC MUL Instruction

I wish I had an AB SLC PLC that I could play with to answer these questions myself, but I don't!

I have a couple questions related to the MUL instruction for the SLC 5/05 PLC.

• During integer operation, S:13 and S:14 contain the 32-bit signed result of the multiply instruction.

• Is it possible to use S:13 as one of the sources of a MUL instruction, or will the MUL instruction overwrite what's in S:13 before it reads the data there?

I appreciate any help! Many thanks!!

Len

The MUL instruction is capable of 32-bit math, if at least one of the Sources (A or B) are floating-point data type (F8:0, etc.). If you try to multiply a float with a constant and move the result to an integer (N7:0, etc.), it will fault the CPU on math overflow. If you put an unconditional OTU coil in a rung addressesd as S:5/0 (math overflow trap), the CPU will not fault, but since you are moving the result to an integer, it is truncated to the max value of a 16-bit integer (32768). If you multiply a floating-point address and move the result to a floating point address, you will get a 32-bit result (i.e. greater than 32768). You can use S:13 as one of the SourceA or SourceB values, but in any case, you should put in the unconditional OTU I mentioned to prevent CPU fault on a math overflow. I have attached examples of a SLC 5/04 program: the first is Float x integer = float; the second is integer x constant value = integer; the third is float x constant value = float; and the last is S:13 x constant value = integer. I hop this helps.