ControlLogix/PanelView DF1

Hi there
I've got a CLX connecting to a PanelView via DF1. As I understand it, my tag addresses in the PanelView still have to follow the SLC B, N, F etc. format, and in L5K I use Logic->Map PLC/SLC messages to 'map these tags to an array in the CLX.
Here's my question. If I have three tags with addresses N7:0, N7:1 and N7:10 and I map file 7 to my_tag[50] will they end up in an equivalent position i.e. my_tag[0], my_tag[1] and my_tag[10] or will N7:10 map to my_tag[2].
Hope that makes sense?

Paul

I've had a similar project

I did a Compactlogix with Panelview 300.

Your tags in the Panelview, N7:0 and N7:10 will be mapped to the CLGX my_tag[1] and my_tag[10]. The processor will not know which tags are being used in the panelview.







Panelview's and Logix5000: Making an easy thing difficult.

Just be sure that myTag[50] is of datatype INT, and the word offsets will be 1:1 as you expect.

I'm in PanelView Plus class this week.... a totally different animal. I'm looking forward to digesting this information and really building some applications with it.

As it happens, I just got an emergency job to transfer an SLC5/04 program + Panelview 1000 DH+ to ControlLogix with PV1000+.

The original programmer nicely made seperate bit files and integer files for alarms, setpoints, controls, and status's. At this point, I've made bool array's and int arrays, and mapped them to the file, then alias'ed them as the original SLC bits and ints. I really hope this works; it's a bad situation as I won't have any of the hardware to play with.

I did a CTC to CompactLogix project, so I had to do the mapping bit. It worked just fine for integers (N7) and floating points (F8) arrays.

However for bools (B3) there were problems mapping to a BOOL[] array. I could read every location from the CTC. I could write the first 32 bits (BOOLS 0 to 31) OK, but when writing higher BOOLS, it would screw up and write to the wrong locations. Could not figure out any rhyme or reason. BTW, the CTC needed to use PLC5 mode communications.

Solved it by using an array on INT's in the CL and word/bit (B3:4.5 - b3[4].5) vs bit address (B3/69 - b3[69]) . Since the CL was word[].bit, there was a direct mapping to the array.

Dave

Hrm... Welllll.... I *Hope* I'll be ok with the bools then, I made array's of BOOL[64], leaving room for expansion. Currently there are only about 22 bools actually used, but as usual, they are spread out as high as B40/50 ish.

If it won't run for the customer, I guess I'll have to plan on making a visit to massage things around. I really REALLY don't want to start editing thier Panelview though.

Just curious, what firmware were you using for the CLX? I'll be having them dump in the 11.whatever release.

I really REALLY don't want to start editing thier Panelview though.

Click to expand...

The CTC didn't allow b3/xxx type addressing so I was using B3:xx.xx type, so I only had to change the CLX addressing. Wasn't much pain as I was testing it everything as I went along, before doing all the code.

For firmware, I think it was 11.11

Hopefully, since you're doing AB <-> AB you won't have the problem.

Dave