2 shifts or not 2 shifts...that is my question

I have 2 shift registers with the first handing off to the second. The second register must move the bits through twice as fast as the first...but both registers are triggered by the same pulse from a proximity switch. The second register corresponds to a section of machine that mechanically moves twice as fast. My brain isn't working well today so I'm looking for some ideas to "double pulse" the second shift register. I tried parallelling the on and off pulses from the proxy with separate ONS after them, but I think the pulse duration is too short because I wasn't getting anything close to "double" (at least that's what a test counter told me). Maximum pulses per second is about 40, with 2mm wide surface activating the input. This is a CompactLogix system with DC input (IQ32). Thanks!

Does it matter where in the cycle the second pulse happens (Midway)? How fast does your pulse for the initial shift occur? You might be able to use a timer if the timing doesn't matter, otherwise, you will probably need a second input for the shift.

Brijm...no, it doesn't really matter when it happens. I just need the second register to shift twice for each tooth pulse. I suppose I could wire a second parallel input, but hoping that I can do it in software. The pulses are maximum 37 per second...and I think the "on" duration is about 2-4mS.

Wait...I apologize. The test counter I had programmed in was not counting all the pulses for some reason. I changed the counters to "ADD" instructions and now my parallel xic/xio rung is adding up doubly fast...so I think things are ok. Thanks again!

Why not calling the function which shifts the register twice on each pulse ?

bluenoser337 said:

The pulses are maximum 37 per second...and I think the "on" duration is about 2-4mS.

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Depending on scantime limitations and hardware limitations (what are the input's minimum "on" time and "off" time requirements?)you will probibly need a pulse extender ie. an external hard wired timer. Here is one example. http://www.turck-usa.com/illustrations/B0313_09-10.pdf Another thought is to extend the "flag" you are using to trigger the input.

bluenoser337 said:

2mm wide surface activating the input

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Is it possible to extend this somehow?

Now concerning the "twice as fast" shift register. Does the machine need twice as many steps? Or perhaps half steps? It doesn't sound like it's a resolution thing because you are planing to use the same shift point. Perhaps you left something out of the description that qualifys the need for twice as many shift points?

jacekd...that sounds like a "Siemensy" solution (function call)...which I think would work...thanks! milldrone...yes, the second section of the machine must do its functions twice as fast because the second section of the machine moves parts through at twice the speed of the first. I think everything is a-ok now (my previous post). Thanks all!!

why do it twice, why not accept that the second FIFO increments are twice the length as the first?

I just can't see the need to increment twice unless you plan to pop something into the regeister between each pulse.

PeterW...sorry, I don't understand what you mean by "why not accept that the increments are twice the length as the first". Maybe it is because I am using a set of "COP" instructions to move the data through words "from the low addresses to the higher addresses". Thanks!

PeterW said:

why do it twice, why not accept that the second FIFO increments are twice the length as the first?

I just can't see the need to increment twice unless you plan to pop something into the regeister between each pulse.

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Peter, your verbage is soooooo much clearer than mine!

The bits in the word being shifted actually operate outputs based on the bit pattern set by the operators on the slower first half of the machine. Say there are 3 stations on the slow front-end of the line, and 4 stations on the fast half. The first operator selects, for a particular part, "spray blue, eject piece, and don't do operations 3 and 4". The second operator may add operation 3 down the line further. This bit pattern travels through the slow section and moves onto the double speed section. The tools performing the operations must be activated for only half the time as the ones on the slow part of the line...hence the need for also shifting at twice the speed. Hope this answers the "why". Thanks!

Easy - for the input signal create a leading edge pulse and a lagging edge pulse (pulse for single scan). Use the leading eadge pulse only for the first shift register and both pulses for the second shift register. Your only problem may be timing if the input pulse is not regular.

woody...thank you....that is exactly what I am doing...read back several posts

my parallel xic/xio rung

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. You got it right on!! I started this thread because I initially thought this wasn't working for me...but it is actually working A-1. Thanks!!
PS - The input pulse is very regular, so no trouble there.

PeterW said:

why do it twice, why not accept that the second FIFO increments are twice the length as the first?

I just can't see the need to increment twice unless you plan to pop something into the regeister between each pulse.

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What Peter is saying, is tht you only need to shift the pattern once per pulse. If you shift twice, you get two copies of the same bit in the seconds file. It will still be the same data pattern if you only shift once in on big file.

Later on in your logic that is based off the 2nd half of the file, adjust your interpretation of hte position.


00000010010010001001010101000100101010101001
|----scale factor x---|--scale factor x2---|
x=inches//mm per pulse
x2=x*2

I don't know if your driving logic is driven from real engineering units as my example. Or more like known bit positions for machine locations.

If the latter, then when you hand calculate the product position (bit postiion) to trigger the operations, just use the scale factor to determine which bit corresponds to the physical location.

Either way, there is no programming benefit to double shifting when you can use a little more abstraction. The data will be of equal quality to the CPU and will be simpler and more efficient once you think in those terms.

Just use good comments
Paul

Okie...the positions in the register where the bit patterns are being utilized ARE **known positions for machine locations**...and the bits aren't being used to trigger devices (ie:leading edge)...they are actually operating the device for the number of times the bit is a "1" when it passes by the "extraction" location. It's a very simple, clean concept that follows the machine precisely. If 37 bit patterns (DINTS) are moving through the slow section every second, performing a 1-second operation, then the same 37 DINTS continue to move through the fast section of the machine performing 1/2 second operations. The benefit is that the same "group of values" can move through the machine from start to finish. Thanks for the post!!