PLC5 Float Error How to do DINT

brooksg44

Member
B
Join Date
Feb 2008
Location
alabama
Posts
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I have the following logic in A/B PLC5
CPT F8:5 (((F8:3 * 86400.0) + (N7:13 * 3600.0)) + (N7:14 * 60.0)) + N7:15
F8:3 = 13936
N7:13 = 16
N7:14 = 20
N7:15 = 8

Results in F8:5 = 1204129000 Should be 1204129208.
Floating point is killing me. Any ideas how to do unsigned integer math in PLC5. Trying to do unix epoch in plc seconds since 1/1/1970 UTC for timestamping and date math later.
 
To the best of my knowledge there isn't any built-in support for unsigned single or double integer math. When I have needed to do this I had to babysit the overflow and sign the hard way.

Sorry.
Keith
 
A hint and a question

Hint, a double integer add can be done like this
Add N7:2-N7:3 to N7:0-N7:1 since the PLC is a big endian cpu assume that even address are the most significant integer.

ADD N7:3 N7:1 N7:1 Now N7:1 has the low 16 bits
XIC S2:CarryBit ADD 1 N7:0 N7:0 Add carry, forget the overflow, just make sure it doesn't cause a fault.
ADD N7:2 N7:0 N7:0 Now the most significant integer is correct

N7:0-N7:1 is a double integer. Note, it will not make sense to display this.

I don't the the bit ID for the carry bit. I don't know why people don't use it more. I use it all the time when I program in assembly language.

Now I need to know. Is there a way to shift 2 integers without copying them int the B register? The goal would be to shift 32 bits at a time. I know this can be done in the B registers but what about the N registers? If I can do this then the answer will be easy. Some one help me help brooksg44.
 
You can enter integers for operation by the bit shift instructions.
Keep in mind that even though the AB plcs use big endian processors user memory access is in little endian format. The integer pair N7:0-N7:1 viewed as a double would have the low word in N7:0 and the high word in N7:1. Don't ask me why. I don't design 'em, just use 'em.

Peter, have you actually tried this on a PLC5? I know it should work at the processor level. But with the odd limits they place on integer math I don't know how that would work out in the plc.

Keith
 
brooksg44 said:
I have the following logic in A/B PLC5
CPT F8:5 (((F8:3 * 86400.0) + (N7:13 * 3600.0)) + (N7:14 * 60.0)) + N7:15
F8:3 = 13936
N7:13 = 16
N7:14 = 20
N7:15 = 8

Results in F8:5 = 1204129000 Should be 1204129208.
Floating point is killing me. Any ideas how to do unsigned integer math in PLC5. Trying to do unix epoch in plc seconds since 1/1/1970 UTC for timestamping and date math later.
Click to expand...

I just posted a program on how to do 32 bit math in a SLC500 a couple of weeks ago. It will work in a similar way in the PLC/5. There is also a PLC5 example in AB's online knowledgebase. Search for unsigned integer.

http://www.plctalk.net/qanda/showpost.php?p=255399&postcount=15
 
kamenges said:
You can enter integers for operation by the bit shift instructions.
Keep in mind that even though the AB plcs use big endian processors user memory access is in little endian format. The integer pair N7:0-N7:1 viewed as a double would have the low word in N7:0 and the high word in N7:1. Don't ask me why. I don't design 'em, just use 'em.
Click to expand...
You may be right. The optimal way to treat the order of the two integers depends on how the BSL instruction works. If the BSL shifts bit 15 to bit 16 then N7:0 should be the least significant word.

Peter, have you actually tried this on a PLC5?
Click to expand...
No, that is why I asked for information on how the PLC5 works. I don't even have a .pdf file on the PLC5.

I know it should work at the processor level. But with the odd limits they place on integer math I don't know how that would work out in the plc.
Keith
Click to expand...
It will work on a SLC5/0X. It is much cleaner than Alaric's code.

Adding is not enough. A SLC returns a 32 bit number for the result of a multiply. Does the PLC5? This result must be shifted and added to the 32 bit accumulator. I need to know if the BSL instruction will shift 32 bits if they are in N7:0 and N:1. I need to know if how the bits are shifted.
 
The PLC5 doesn't have the equivalent of S:13 and S:14 from the SLC. It also doesn't have to option to perform unsigned integer operations like the SLC does. If you add 32767 and 1 you get 32767, not -32768 like you can in the SLC. So in the PLC5 you need to do everything the hard way.

The BSL will shift bits across element boundries up to the length of the shift array, moving from lower addressed elements to higher addressed elements. So if you start with a 1 in N7:0/15 and do a BSL it will end up in N7:1/0. The PLC5 BSL will only shift one location every false to true transition (as far as I know).

Keith
 
This is getting deep and we are just talking about addition so far.
So let me pose the question another way. This is for an environmental system where I need to record events, totalize time on the events, and roll off events that are 24 hrs old. Totalizer should ramp up with events and ramp down (provided no new events) as events get older than 24 hrs.

So is there a better way to do date arithmetic in a PLC5 than what I am attempting?
 
kamenges said:
The PLC5 doesn't have the equivalent of S:13 and S:14 from the SLC. It also doesn't have to option to perform unsigned integer operations like the SLC does. If you add 32767 and 1 you get 32767, not -32768 like you can in the SLC. So in the PLC5 you need to do everything the hard way.
Click to expand...
Rockwell must have gone out of their way to screw this up. It is no wonder so many PLC programmers are brain damaged. What a waste of time.

Even on a 8 bit processor I could do this:
TotalSeconds=((days*24+hours)*60+minutes)*60+seconds

Code: 
Mulitplying by 24 is
loading days // 1
shifting left 1 // 2
adding days // 3
shifting left 3 times // *8=*24
add hours
save in temp
shift left 4 // * 16
subtract temp // * 15
shift left 2 // *4=*60
add minutes
save in temp
shift left 4 // * 16
subtract temp // * 15
shift left 2 // * 4=*60
add seconds // done
save in totalseconds

If the PLC5 wasn't crippled this would be easy. BTW, no multiply instruction required. The adds and shifts must be 32 bit adds and shifts.

So is there a better way to do date arithmetic in a PLC5 than what I am attempting?
Click to expand...
This must be why there is a need for AB tech support. I am frustrated that something so simple is made so difficult.
 
Last edited:
Peter,
I follow your code somewhat. But I got lost in the details. I understand that a left shift is a multiply. Since the PLC5 is 16 bits how would I transfer the high order bit of low order word to the lsb of high order word?

Investigating using Julian Date and HH MM SS in seperate N registers.
Fearful that in the end Floating point or 16 bit limit going to bite me again when I try to see if stored events are 24 hrs older than new events.

Thanks to everyone for the insights so far,
Greg
 
Originally posted by brooksg44:

Since the PLC5 is 16 bits how would I transfer the high order bit of low order word to the lsb of high order word?
Click to expand...

The PLC5 BSL instruction is a 'file' instruction. It operates on a group of data elements as if they are a single unit. One limit to this is you need to start your BSL on an element boundary, which isn't a big deal. As I stated above the LSW is the lower element address.

So assume you have a 32-bit integer in N7:0 and N7:1. N7:0 contains the LSB. You can define a bit range as long or as short as you want. In your case I would define 33 bits so you can get a carry bit however that may not be an issue for you. Remember that you need to enter your starting element (LSW) with the # sign ahead of it when you enter it in the BSL instruction.

If a bit is in N7:0/15 and you perform a BSL the bit will end up in N7:1/0. If you said your bit range is 33 bits, there is a bit in N7:1/15 and you perform a BSL the bit will end up in N7:2/0.

The problem you have with this is that the adds are limited to 16 bits. The shifts can be as long as you like. Also, the BSL will only shift by one bit location per false to true transition. So doing a 'BSL 4' gets a little tricky.

If you can put some limits on your application (you always know the subtraction result will be positive, you always know the DINT will be positive, etc) you can probably make a specific solution that is pretty compact using floating point intermediate registers.

Keith
 
brooksg44 said:
Peter,
I follow your code somewhat. But I got lost in the details.
Click to expand...
This is a problem. Multiplies by powers of 2 can be done with just shifting. Multiplies by other numbers require shift and adds or shift and subtracts.

number shl 1 + number = 3 * number

number shl 4 - number = 15 * number


I understand that a left shift is a multiply. Since the PLC5 is 16 bits how would I transfer the high order bit of low order word to the lsb of high order word?
That is why there is a need for a 32 bit add, subtract and shift routine. Alaric's solution must get around the PLC5's 16 bit limitation. That must be the best you can do with a PLC5.

Investigating using Julian Date and HH MM SS in seperate N registers.
Fearful that in the end Floating point or 16 bit limit going to bite me again when I try to see if stored events are 24 hrs older than new events.
Greg
Click to expand...
Now it is time to investigate Alaric's 32 bit solution but I fear the final result will just be too messy.
Click to expand...
Click to expand...
 
This should be very similar to Alaric's solution but it doesn't count on the unsinged integer result capability of the SLC series. And, yes, it's not pretty.

My other thought was to do this like a micro-p does it in hardware. That would be even messier yet but it would most likely be faster.

Keith
 

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