Weird OSR Problem with SLC500

ArikBY

Member
Join Date
Oct 2003
Location
Oranit Israel
Posts
1,434
Hello everybody

I Have weird problem with one of my PLCs.SLC500 CPU 505.
I wrote rung which look like that.
Ld b/1 osr b/2 out b/3
B/3 should never be ON more then 1 scan time.
But some time it become ON when b/1 is ON.
Its look like the OSR is not exist.
and all the cycle stoped.
When I change the PLC to stop mode then Run.
The PLC keep working properly until the next time.
Last time it happed today on 5 AM and stoped line of 20000 buns/hour.
I stayed there until 5 PM and its not appeared again.
I have to mention its not the first time in this PLC.
I had to Print Sceen when I saw that but I was so busy to think about that.

Any idea?
 
Make sure that the address of the OSR (B/2) is not used anywhere else in the program. Unexpected things can happen if it is.

Also, are you sure that B/1 was on all the time? Was it possible that it was pulsing? Maybe turning on/off so quickly that the online monitoring could not update fast enough to watch it change? (Probably not, but just a though).
 
Attached my program
if you search for b/45 this one make the problem this morning.
The problem apear also on other OSR.
 
The OSR B3/44 used for OTE B3/45 is also used in the Fill command (Ladder 2, Rung 0). You are writing 0 to this bit, in the case of a fault. It's probably not necessary to clear an OSR instruction incase of a fault or estop.

I'd imagine that this has something to do with the issue. It seems that many, if not all, the OSR instructions are having their addresses cleared with the instruction on Ladder 2 Rung 0.

You probably don't notice it until one of the Dividers Fault (B3/1200) and the instruction is true.
 
Yes, Tharon is correct. The OSR instruction uses a bit to store the last state of the preceeding logic. When the OSR is scanned, and the storage bit is a "0", the output logic is made true and the storage bit is set to "1". If the OSR is found to already contain a "1", then the output logic is deemed false. That is how the logic is caused to execute for only one scan.

If you CLR (FLL with zero) the contents of the OSR bit, then next time it is processed, the output logic is made true, and the OSR bit is set. If again on the next scan, it has been cleared again, the same thing iwill happen again, so the output logic will appear to be "stuck" true.

Move all your OSR storage bits to locations outside of the FLL range and your program should work as expected.

Paul
 
I know I cleared OSR in fault but it happened without fault.

The fault happend when the cycle did not finished.
I thought about that to move all OSRs to another bit location.
which is not cleared.
Another thing, why it happened one in month not allways?
 
I'm not sure whether this applies to SLCs, but there was a problem in the PLC5s with OSRs if both bit addresses were assigned from the same word. I used to pick two adjacent words in a Binary register and then assign matching bits from the adjacent words to get the proper operation.

Bob A.
 

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