source for FLL

mpgap

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Join Date
Mar 2008
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CA
Posts
7
Hi all... I have an easy one for you, of which, I need some clarification. I have searched and have not found the answer... and thus...

I have a PLC-5 program that uses several FLL instructions, each having a negative number as the source. As such I have played around a bit to see what exactly this negative number is doing and have made an assumption:

Reference the attached image…
For the source, I understand that a positive decimal number is placed into the destination as a binary number. It would appear to me that a negative decimal number does the same, however, the binary number is now inserted with the opposite value: the 1’s are now 0’s and a 0’s are now 1’s… Except for all the bits up to and including the first bit location that would have normally been a 1 if the source had been a positive decimal number. These “excepted” locations remain unchanged.

And thus, I am looking for clarification…:oops:

Thanks in advance.

temp.jpg
 
When the MSB is set, and all the other bits are zero, the decimal representation is -32768. This is the lowest value representable as an integer.

Add one (-32767) and you get the MSB set and the LSB set. And keep working from there.

Your bit pattern is the normal representation of -132. Nothing special is happening with the FLL instruction.

It is simply the way 2's complement binary represents negative numbers, using the MSB as the sign bit.
 
Thanks for the info... looks like I will need to do little light reading on two's complement!! 📚
 

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