ladder help

jtashaffer

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When writing a program using 3 spst switces to trun on a light, all are interlocked so only one can be on at a time. How would I use a bit to interlock them insted of the inputs?
 
When writing a program using 3 spst switces to trun on a light, all are interlocked so only one can be on at a time. How would I use a bit to interlock them insted of the inputs?

If by this you mean that if any two switches are on, then the light is off, then this is how I would do it.


I1 I2 I3 Light
---] [-----]/[-----]/[-----------+------------( )
|
I1 I2 I3 |
---]/[-----] [-----]/[-----------+
|
I1 I2 I3 |
---]/[-----]/[-----] [-----------|

 
 
Redrawn diagram that rootboy posted.

I1 I2 I3 Light
---] [-----]/[-----]/[-----------+------------( )
|
I1 I2 I3 |
---]/[-----] [-----]/[-----------+
|
I1 I2 I3 |
---]/[-----]/[-----] [-----------|

 
But the Inputs are "bits" in the PLC data-table.

The logic as posted is sound, and is often used AS WELL AS interlocked switches or pushbuttons wired to inputs to guard against switch contacts shorting out.
 
I would use the method Rootboy has suggested....

However, if this is a homework assignment then the exercise might be intended to help you with developing and simplifying logic.

In which case lets take a minute and develop a truth table for conditions where an interlock bit might be set.


SW1 SW2 SW3 INTERLOCK
1 0 0 0
0 1 0 0
1 1 0 1
0 0 1 0
1 0 1 1
0 1 1 1
1 1 1 1




Now lets write the equation:

Interlock = (SW1 + SW2) + (SW1 + SW3) + (SW2 + SW3) + (SW1 + SW2 + S3)

We can simplify that

Interlock = (SW1*(SW2 + S3)) + (SW2 + SW3)

Now you can develop the output equation.

Light = (SW1 + SW2 + SW3) * NOT Interlock.

I'll leave it to you to convert these into ladder code, after all if it is homework I don't want to do it all for you. 🍺
 
B3:0 is not a binary bit.

It is a word address - B3:0 contains 16 binary bits

The addressing syntax is....

Filetype Filenumber : Element / Bit

A unique bit address would therefore be B3:0/0

i.e. bit 0 in word 0 of binary file 3.

Alternatively, the programming software allows you to skip the word address... B3/49

is bit 49 in the binary file B3

it is the same address as B3:3/1

the maths is easy - word address is bit address/16, remainder is bit address

B3:0/0 is the same bit as B3/0

TConnolly's post is good thinking, it provides you a means to generate an "interlock" status when more than one input bit is on. I would also program the interlock status should be on if NO inputs are on. You are simply using combinational logic to verify the switches are valid.
 
Last edited:
Ok the internal relay bit is B3:1/0. It is a class but for work training. I am learning rs5000. I can write the program like you shouwed but I dont understand how to use the internal relay bit B3:1/0 as the interlock.
 
With switches 1 and 3 ON, Tim's interlock would look like the attached picture.

I think Tim meant this to be the Boolean equation:

(SW1*(SW2+SW3)) + (SW2 * SW3)

3-SWITCH INTERLOCK.jpg
 
Last edited:
With all 3 switches on, Tim's interlock would look like the attached picture.
Actually, shouldn't the lower rung be I:1/2 AND I:1/3, not I:1/2 OR I:1/3?

With your OR branch, the interlock bit will be on if switch 2 OR switch 3 is on.

🍻

-Eric

EDIT: Oh sure, Lancie... Fix your picture on me... :ROFLMAO:
 
I am wondering Why you need to do this?
If you are training and learning.
Maybe consider the MVM (move with Mask) command (of the top of my head)
then use the B3:0 bits and interlock them to the output
 
 
Redrawn diagram that rootboy posted.

I1 I2 I3 Light
---] [-----]/[-----]/[-----------+------------( )
|
I1 I2 I3 |
---]/[-----] [-----]/[-----------+
|
I1 I2 I3 |
---]/[-----]/[-----] [-----------|


So after all of these years on PLCS.NET, I *still*can't get the forum to quit eating empty spaces. :)

What's the secret?
 
EDIT: Oh sure, Lancie... Fix your picture on me...
Sorry, Eric. I first tried to use Tim's logic, but then realized it had an error, so had to figure out how to fix it.
 

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