How Online Editing Works

JCBondIL

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Join Date
Aug 2011
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Illinois
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I had a question posed to me, and I've been banging my head against the wall to find an answer. So here it is:
How does online editing work in the Logix platform? By this, when you test an edit, is the program running un-interrupted, where the program is routed to the edit and then back? How about when the edits are assembled? My guess is that the program runs continuously in the first case and stops (and restarts) in the second case. I appreciate any help that anyone can give me on this. I'm really tired of looking through manuals...

Joe
 
I'm sure someone here can give a thorough explanation, but here's my guess... When you 'test edits', the program points to the edited rung (as you mentioned). When you 'assemble edits'. it simply deletes the original rung, and the edited rung becomes the new 'original'.

🍻

-Eric
 
More specifiic Question

I'm sure someone here can give a thorough explanation, but here's my guess... When you 'test edits', the program points to the edited rung (as you mentioned). When you 'assemble edits'. it simply deletes the original rung, and the edited rung becomes the new 'original'.

🍻

-Eric
I'm sorry - I didn't ask the question the right way. How about this:
When online editing, the mode of the PLC continues to be Remote Run. BUT - when you accept an edit (send it to the PLC)does the scan time take a hit? Same question for when edits are tested and when the edits are assembled.
If, for example, you have an input that has to be scanned (and logic executed) within say at least 50 milliseconds, and your current scan time is, say 30 millisconds, will your scan time be bumped past 50 millisconds?
I think that kind of narrows down what I'm looking at. You can say that the PLC is "Online", but is there a processing impact?
 

Definitely an interesting discussion. Of course after reading through it all, I wonder why the program doesn't highlight exising edits more, and what happens with multi-program CPU's? But I digress. Let me state my question better:

When online editing, the mode of the PLC continues to be Remote Run. BUT - when you accept an edit (send it to the PLC)does the scan time take a hit? Same question for when edits are tested and when the edits are assembled.
If, for example, you have an input that has to be scanned (and logic executed) within say at least 50 milliseconds, and your current scan time is, say 30 millisconds, will your scan time be bumped past 50 millisconds?
I think that kind of narrows down what I'm looking at. You can say that the PLC is "Online", but is there a processing impact?
 
...
when you accept an edit (send it to the PLC)does the scan time take a hit?

Short answer is yes. How much of a hit depends on which processor you're using and how many edit zones you have. I have seen situations where the scan time spike is extreme in a SLC when I had about 30 separate edit zones scattered all over the place.

JCBondIL said:
Same question for when edits are tested and when the edits are assembled.
If, for example, you have an input that has to be scanned (and logic executed) within say at least 50 milliseconds, and your current scan time is, say 30 millisconds, will your scan time be bumped past 50 millisconds?
I think that kind of narrows down what I'm looking at. You can say that the PLC is "Online", but is there a processing impact?

Yes again there is a scantime "hit" or spike. However, the assemble edits step should only impact the scan time briefly (perhaps only one scan).

If your scan time is 30ms and you have plenty of memory, (and if it's a SLC you are not beating it to death with overhead work like communications) then you would have to have a whole bunch of edits going on to see a spike over 50ms. I can't define "whole bunch" any better than that, and I haven't seen any calculations available for this, but they may exist. The existence of an STI routine and many other factors would have to be considered, too.
 
Last edited:
Thanks for the reply. One of the problems in figuring this out is where a delay at? In the PC, the PLC, etc. And it makes sense that there *should* be a delay. The program should be re-written to flash so that you would have one contiguous block instead of a block that will increasingly fragment as edits are made to the program. I just didn't know if they had a function model that could avoid this problem. Anyway, thanks for the help. Appreciate it!
 
The program should be re-written to flash so that you would have one contiguous block instead of a block that will increasingly fragment as edits are made to the program. I just didn't know if they had a function model that could avoid this problem. Anyway, thanks for the help. Appreciate it!

The program doesn't increasingly fragment in a SLC or PLC-5 although this may happen in a Controllogix controller.

In a SLC/PLC-5, the scantime spike is caused by the processor having to insert space in memory and "scoot everything down" to make room for the edit(s). This is why you get a bigger spike when you insert logic at the beginning of a very long program than if you are appending it to the end.

Avoiding the problem is likely possible. It may be useful to put your scantime critical logic in an STI routine or use input driven interrupts to process it. There are also many techniques that can be employed to reduce scan time in general.

I once cut 5ms off the scan time in a PLC-5 simply by moving instructions that were most always evaluated false (example: XIO Auto_Mode) to the beginning of the rungs, and instructions that almost always evaluate true (XIC Estop_OK) to the ends.

Eliminating JSR instructions, indirect addressing, JMP/LBL can help a lot too.
Paul

EDIT: I just reread your original post and you ARE asking about the Logix platform. I would have to defer to others to give more accurate answers for that system.
 
Short answer is yes. How much of a hit depends on which processor you're using and how many edit zones you have. I have seen situations where the scan time spike is extreme in a SLC when I had about 30 separate edit zones scattered all over the place.


Ive noticed this too. I did a few online edits last week and it was taking abour 5 seconds, that could also be cause my computer is super slow.
 
Ive noticed this too. I did a few online edits last week and it was taking abour 5 seconds, that could also be cause my computer is super slow.

Take it from me, that 5 seconds was definitely not down to the PLC. Could be time to invest in a decent spec PC.
 
....I once cut 5ms off the scan time in a PLC-5 simply by moving instructions that were most always evaluated false (example: XIO Auto_Mode) to the beginning of the rungs, and instructions that almost always evaluate true (XIC Estop_OK) to the ends.

Eliminating JSR instructions, indirect addressing, JMP/LBL can help a lot too.
Paul

EDIT: I just reread your original post and you ARE asking about the Logix platform. I would have to defer to others to give more accurate answers for that system.

RA training teaches you to optimise rungs by...

1. Placing instructions that are more likely to be false at the left of the rung. Explanation : Once the rung evaluates as false, no further conditional instructions can make it true again, so scan time can be saved by skipping through further instructions. {aside : On the 5/250 (Pyramid Integrator) platform, the processor actually skipped to the start of the next rung, then stepped backwards to turn off non-retentive outputs.}

2. Placing conditional branches that are more likely to be true at the top of the branch structure. Explanation : Once a branch has evaluated as true, it cannot be undone by code on subsequent branches, so there is no need to process them.

However, in the Logix5000 platforms, we can put output instructions anywhere we want on the rung - the placement restrictions are gone.

That means that the whole of the rung has to be at least scanned, just to check for output instructions that could exist on input branch structures.

Sure, there are times when the processor doesn't have to "evaluate" (and that means retrieving tag values) once the rung is deemed to be true or false, but it has to look in all branches. So the savings that can be made in a PLC5/SLC don't really apply in the same sense to the Logix5000 series.

EDIT: I suppose I'll have to quantify that - I'll dream up a test program tomorrow and post the results...
 
{aside : On the 5/250 (Pyramid Integrator) platform, the processor actually skipped to the start of the next rung, then stepped backwards to turn off non-retentive outputs.}

Daba

That sounds very intresting. Can you expand on it a little bit. I am still not clear on how that worked?

I still have 4 of those things in my plant but the are scheduled for replacement Q3 Q4 this year and when ever I get time to design the new system.
 
I was told they added optimisation for the 5/250 to save on scan time in the way I described.

Since that platform had the "traditional" output instruction placement restrictions as PLC5/SLC, they decided that once the rung was false, it would be quicker to get to the output instructions by working backwards from the next rung, turn off non-retentive outputs, reset TONs, etc. etc. Vice-versa for when the rung evaluated true....

Actually, it also explains why they omitted the ONS, something I complained about...The response I got was "The 5/250 doesn't have the ONS instruction" o_O

I can't say for certain that is exactly what it did, just something that came up in talks with tech support in the very early days of using 5/250's (my first project they had a limited instruction set - no GRT, LES, GEQ, LEQ, ADD, SUB, MUL, etc. - everything was done with CMP and CPT - a real nightmare).

I was also told I had only the second 5/250 to enter the UK, presumably the first went to the training school !!

I don't know how this information can help you - your PI's have to be replaced, presumably you are going ControlLogix, or at least CompactLogix. There's a good 10 to 15 years between the platforms - and knowing that your 5/250's were optimised for speed shouldn't worry you that the new processors won't be up to the job.
 
None of it will carry over into the new system (contrologix)just curious primarily.

I like learning about the older stuff just to know how it ticks plus I still have some of it.

When we go to contrologix on those it will be a total gut rip and replace,controls, wiring ,conduit,etc.
 
I am trying to upgrade this stuff as hard as I can as we still have PV 1200 E and 1400E panels,SLC 100,SLC 150 and plc 2,3 controls.

1305,1395,1336 drives,etc.

I have over 800 plc's total between 3 building on this site and about 25% of it is still the real old rockwell stuff. Trying to change it before it bites me.
 

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