Copy F to N register slc500

I am using a SLC500
is it possible to copy an F register into 2 N registers ??

I am looking for to transfer the bit image of an F Reg in 2 N regs.

I know that the MOV will not work

Example F8:0 = 95000
I want want the 32 representation of this value over N7:100 & N7:101

I tried the COP statement No good
Cop
Source #F8:0
Dest #N7:100
lenght 2

Below is what i am seeing

F8:0 = 95000
N7:100 = 18361
N7:101 = -29696

F8:0 = 1234
N7:100 = 17562
N7:101 = 16384

F8:0 = 255
N7:100 = 17279
N7:101 = 0

F8:0 = 2
N7:100 = 16384
N7:101 = 0

You're getting exactly what you are asking for:

F8:0 = 95000.0 (decimal, IEEE754 Floating Point) = 47B98C00 (hex)
N7:100 = 18361 (decimal, 16-bit Signed Integer) = 47B9 (hex)
N7:101 = -29696 (decimal, 16-bit Signed Integer) = 8C00 (hex)

Are you instead looking to convert 95000.0 (IEEE754 Floating Point) to 95,000 (32-bit Signed Integer) and put those bytes into the Integer file ?

The result you want then would be 95000 (32-bit Signed Integer) = 17318 (hex).

N7:100 = 29464 (decimal, 16-bit Signed Integer) = 7318 (hex)
N7:101 = 1 (decimal, 16-bit Signed Integer) = 0001 (hex)

Exactly which SLC-500 controller and firmware revision are you using ?

SLC 1747-L551 (SER C) (FRN 11)

Yes this what I am looking for
N7:100 = 29464 (decimal, 16-bit Signed Integer) = 7318 (hex)
N7:101 = 1 (decimal, 16-bit Signed Integer) = 0001 (hex)



I wondering if the was easier way (or different) than doing the math.

The COP is giving you the correct representation, or you are not describing what you actually want.
http://babbage.cs.qc.cuny.edu/IEEE-754.old/Decimal.html

I looking for the 32 bit integer representation of 95000 over the words

jimtech67 said:

I looking for the 32 bit integer representation of 95000 over the words

Click to expand...

In that case, yes, you have to do the math. That isn't a bit-for-bit copy, it is actually a format conversion.

This topic stuck in my head last night so I had to sort it out this morning.

The attached example runs in RSLogix 500. I haven't tested it to see the rounding effects, but it makes sense to me.

What it does is use the behavior of the DIV instruction in the SLC-500 operating system. DIV attempts to automatically convert the data types to the destination data type, so when you divide two Float values but make the destination an Integer, DIV converts from Float to Integer.

But when the destination value is greater than an Integer can hold (+32767), the instruction sets a fault flag in the OS (S:5/0, Overflow). We can use this flag to indicate that the value is greater than +32767, and then use Floating Point math to determine what the Least Significant Word is.

I haven't tested this thoroughly. I think you start to lose resolution after 2^23 and it only works to 2^31. Maybe after I've had some more coffee.

Here's another try using brute force subtraction. This has the same float size restrictions that Ken noted with the added feature of taking more time as the float gets bigger.

You'll have to copy the logic (written for a Micrologix 1100) as I only have the free version of RSLogix500 at home.

Please ignore my example in the previous post - it will fail when the final amount left in the float is greater than 32767. Sorry.

Gentlemen Thanks for the help.

That did the trick