ControlLogix 5000 Minor Math Fault Question

rdrast

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Join Date
Apr 2003
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'Morning All,

I've run into something that is just annoying me on a CLX System using counter modules.

The counter modules have 24 bit counters per channel, and since my application has to deal with up/down counting and rollover, I sign extend each raw count channel before doing other math. Basically:

TEMP_DINT = RAW_COUNT * 256;
SIGNED_COUNT = TEMP_DINT / 256;

It works fine with my application, BUT the CLX Processor reports minor math error (overflow) on the above, even though no overflow is really there. No big deal, except that the fault pops up every scan, and looking at controller properties and seeing 86,242 faults since powerup is, well, annoying.

Annoying, and it masks other possible faults.

Is there any way to temporarily mask the fault? Resetting S:Minor, using GSV/SSV before and after doesn't work... and I'd rather not go through a more elaborate bit-based method of sign extension.

Any ideas?
 
rdrast said:

TEMP_DINT = RAW_COUNT * 256;
SIGNED_COUNT = TEMP_DINT / 256;

Don't use the multiply and divide as you get overflow errors because the numbers are switch between positive and negative numbers.

Use:

TEMP_DINT = RAW_COUNT SHL 8;
SIGNED_COUNT = TEMP_DINT ASR 8;

If the shift left and arithmetic shift right are not available then just check bit23 of RawCount. I am at home and my CLX stuff is at work.

Code:
If RawCount.23 then
   RawCount = RawCount OR  0xFF000000;
else
   RawCount = RawCount AND 0x00FFFFFF;
 
BSL and BSR would be he commands to use, if you are shifting left then right. The only thing to watch for is when using the BSR to make sure the input bit is a copy of the bit 31 of the word you are shifting back to the right, then you will have a sign extend. These commands do not affect arithmatic flags so your minor fault should not occur.
Another solution,,,If the fault is known to be from that math, then build a small routine to clear just that fault.

bitmore
 
Bitmore:

I tried clearing the fault, before, and immediately after each instruction causing it. The problem is that by then, it had already registered in the CPU log. Just annoying.

BSR and BSL would be okay, but they only shift one bit at a time from what I saw, and looping to do the shift of 8 each way just makes my "programming efficiency bone" hurt :)

Thanks for the suggestion though.
 
This 8 year old thread just got hostile...

Well, I don't see the spam, but I'll contribute what my current happy solution to the 8 year old problem is.

You need FBD for logix for this, but it works fine.

Feed the physical 24 bit encoder value into a PMUL instruction in FBD. Set the word size to anything convenient, 24 bit, 16, 12, whatever works for you. The output of the PMUL instruction then becomes a delta value of the physical encoder from the last time the instruction was scanned.

Every scan, just add the output of the PMUL instruction into an internal tag, and you don't have to worry about s:minor due to encoder rollover.
 

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