Please Explain

Daniel81

Member
Join Date
Oct 2012
Location
Mansfield, QLD
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17
Hello all,

I have been asked a question with respect to indexed addressing please see the attachment.

I don't know anything about indexed addressing as I have never done it before, however from what I have read about the value in the index register gets added to the base address?

If you know of any good basic examples I would be most appreciative.

Getting back to the attachment with the COP instruction the source is #N(N19:2):(N19:3). Does this mean that the data from these registers is loaded into the Dest #11:20? If that is so is the data from (N19:2):(N19:3) added/subtracted/multiplied/divided before it is sent to the Dest. I guess what i'm asking is how is the data from these two registers presented and sent to the dest of #11:20?

If some knowledgeable person could describe to me what is happening to the data so I can identify what one of my starting addresses is it would be great.

Thank you
 
Getting back to the attachment with the COP instruction the source is #N(N19:2):(N19:3). Does this mean that the data from these registers is loaded into the Dest #11:20?

No. The data those registers are pointing to will be loaded. This is an address of data : N11:18. In the rung you posted the data is '255'.

In the expression #N[N19:2]:[N19:3] the numbers in square brackets have taken the place of literal (unchanging) numbers defining the file and word the instruction will act upon. So, if N19:2, at execution time holds the value of '23' the processor will look in integer file 23. If N19:3 holds '6' the processor will look in the 6th word of integer file 23. In the end #N[N19:2]:[N19:3] is equal to N23:6. The next time the rung is true N19:2 and N19:3 will probably be different as determined by the value of N11:18 filtered through the LIM instructions.

Additionally, even though the indexed addressing identifier '#' is used, what is actually happening here is referred to as indirect addressing.
 
Hi Doug,

Thanks for your valuable input. I ended up typing up the program and loading it onto my MicroLogix 1400. The only issue I had is I could not put both addresses in the source COP instruction. I received an error saying WARNING: File number doesn't point to the correct file type! I'm not to sure what's going on here, however I just set the addresses one at a time.
First I set the source address to #19:2 and then I entered the data 3, 7 and 14 into the NEQ instruction. I checked the destination address and I received 73, 74 and 75. Next I changed the the source address to #19:3 and entered in the same data and this time I received 120, 80 and 560.
So based on your information I believe the starting addresses of the data are as follows:

Input 3 and the starting address is N73:120
Input 7 and the starting address is N74:80
Input 14 and the starting address is N75:560

Based on the above do you believe I have identified this correctly with respect to the pdf I attached?

Thanks again for your input.

Regards
 
The files have to exist ie N73:120 and N74:80 and N75, however N75 and all the other Integer files (well actually all data files) can only extend to 255 ie N75:255

Steve
 
Hi Doug,

Thanks for your valuable input. I ended up typing up the program and loading it onto my MicroLogix 1400. The only issue I had is I could not put both addresses in the source COP instruction. I received an error saying WARNING: File number doesn't point to the correct file type! I'm not to sure what's going on here, however I just set the addresses one at a time.
First I set the source address to #19:2 and then I entered the data 3, 7 and 14 into the NEQ instruction. I checked the destination address and I received 73, 74 and 75. Next I changed the the source address to #19:3 and entered in the same data and this time I received 120, 80 and 560.
So based on your information I believe the starting addresses of the data are as follows:

Input 3 and the starting address is N73:120
Input 7 and the starting address is N74:80
Input 14 and the starting address is N75:560

Based on the above do you believe I have identified this correctly with respect to the pdf I attached?

Thanks again for your input.

Regards

You received the WARNING at compile time because N19:2 was most likely zero, and N0:xxx doesn't (and can't) exist. If you had manually put valid values into N19:2 and N19:3, then the rung verifies just fine with no errors or warnings.

As stated, it is a warning only, just to keep programmers alert to the fact they have to put valid values in (usually by code), before the instruction will execute. Invalid values at run time will fault the processor under nearly all circumstances, because the Indirect Address will point to an address that may not exist.

But, let me make this clear.... This is NOT "Indexed Addressing" - This is "Indirect Addressing". Indexed Addressing is not supported in ML1400.....

From the RSLogix500 Help.....

Rockwell Automation said:
Indexed addressing is valid with SLC 5/02, 5/03, 5/04, 5/05 or MicroLogix 1000 processors only.


Each of the data-table addresses inside the square brackets will be evaluated (at run-time), to form the "Effective Address"

Example :-

N19:2 contains the value 100
N19:3 contains the value 27

For address #N[N19:2]:[N19:3], the Effective Address will be N100:27

The # symbol that appears (automatically) at the beginning is just an indication that it is either an Indirect, or Indexed, address, and in the case of a ML1400, can only mean "Indirect"


Now I'm curious - If the # symbol is automatically inserted, does it mean that "Indexed" is also performed in the processors that support it ?? That would be a nightmare, but my guess is you cannot mix Indirect with Indexed. I will have to try it when I've next got my SLC 5/05 rig running.
 
http://accautomation.ca/building-a-plc-program-that-you-can-be-proud-of-part-1/
This series takes you through using discrete inputs and outputs to control traffic lights and cylinders. As we progress we introduce additional methods to solve logic. We look at sequencers in a new way and learn how to write programs to allow users to teach the new sequence.

The above examples will show you indirect addressing.
Even though it is not using AB it will show you what is possible with indirect addressing.
Hope this helps you out.
Regards,
 
The files have to exist ie N73:120 and N74:80 and N75, however N75 and all the other Integer files (well actually all data files) can only extend to 255 ie N75:255

Steve

Tip : Using data-files that are larger than the 256 elements allowed.

!! Advanced Use Only !!

You can set-up contiguous files, of the same type, and effectively make a bigger file that can be indexed into.

Example : say you wanted a 500-word integer file...

Easiest way is to create 5 x 100 "N" files, e.g. N100 to N104, each with 100 integers created.

N100:0 to 99
N101:0 to 99
etc. to
N104:0 to 99

...aside : (yes you can do it with 2 files, but it's easier to see which word you will be indexing to with 5 x 100)


Now you can create an Indexed Address like #N100:0. You can now set the Index Register to any value 0 to 499 inclusive, and the processor will add that to the word address to form the Effective Address.

BUT : you will have to set a bit in the status file to....

Rockwell Automation said:
Allow Indexing Across Files Select this check box if you want to be able to index addresses across files in the project...... If this check box is not selected and an address is indexed outside of a data file's boundaries , a fault 002A occurs in the SLC .


But remember, this is for Indexed Addressing only, so will only apply to SLC 5/02, 5/03, 5/04, 5/05 or MicroLogix 1000 processors. Sometimes this is easier than creating Indirect Addresses, and having to manipulate 2 Indirections.
 
I am concerned about a recipe number of 11. In the branch with the LIM test of 5 to 11 the subtract will reduce it to 6. The multiplication by 40 will give 240. The COP will start at N74:240 and continue for 40 elements reading over into N75 copying the first part of recipe 12's data.

This is assuming that the overlap can occur without error. On some I found the error only occurs if an indirect read is attempted past the very last data file regardless of type.
 
Now I'm curious - If the # symbol is automatically inserted, does it mean that "Indexed" is also performed in the processors that support it ?? That would be a nightmare, but my guess is you cannot mix Indirect with Indexed. I will have to try it when I've next got my SLC 5/05 rig running.

According to the SLC-500 Instruction Set Reference, appendix D, indexed indirect is available.

Even the lowly 1100 has an index register but it's not programmer accessible. You can enter a rung like MOV 4 S:24 and it will be accepted but an error will be thrown when you attempt to download.
 
Input 14 and the starting address is N75:560
No - because of the subtract of 12 N11:18 is reduced from 14 to 2 giving 80.

I am going to assume that you want 6 recipes of 40 entries each in each of the 3 N files (73, 74 and 75)

Thus the recipes would be allocated as follows:

0 - 5 in N73
6 - 11 in N74
12 - 17 in N75

but your processing does not support this.

change the LIM 5 N11:18 11 to LIM 6 N11:18 11 (5 changes to 6)
change the SUB N11:18 5 N11:18 to SUB N11:18 6 N11:18 (again changes 5 to 6)

This would also fix the problem I pointed out in my previous post.

I will also assume that you have logic somewhere limiting the recipe numbers to 0 - 17.
 
one problem I see that may be giving you a problem. you have 2 indirect addresses in the same statement. I have seen that give problems in the past.
you need to simplify the statements.
try to create separate file for each recipe then just address the file.
 
To GaryS - Micro Starter Lite allows this (two indirects) on compile (target Micrologix 1100 Series B). I don't have a PLC to download to check runtime. What isn't allowed are nested indirects - an indirect of an indirect - N7:[N7:[N7:20]]
 
Last edited:
To GaryS - Micro Starter Lite allows this (two indirects) on compile (target Micrologix 1100 Series B). I don't have a PLC to download to check runtime. What isn't allowed are nested indirects - an indirect of an indirect - N7:[N7:[N7:20]]

It works on the emulator.

NEQ N11:18 255 BST MOV N11:18 N10:18 NXB COP #N[N19:2]:[N19:3] #N11:20 10 BND
 

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