Ok, use the FBC command in the SLC 5/04.
Use with
processorsSLC Series C processors
listed below:
SLC 5/03 OS302SLC 5/04 OS401SLC 5/05 OS501(Parameters shown are examples only, your data will vary.) FBC example DDT example
Description
The FBC and DDT diagnostic instructions are output instructions that you can use to monitor machine or process operations to detect malfunctions. If you want to detect a malfunction by comparing bits in a file of real-time inputs with a reference bit file that represents correct operation, use the FBC instruction. If you want to change-of-state diagnostics, use DDT.
Both the FBC and DDT instructions compare bits in a file of real-time machine or process values (input file) with bits in a reference file, detect deviations, and record mismatched bit numbers. They record the position of each mismatch found and place this information in the result file. If no mismatches are found, the .DN bit is set but the result file remains unchanged.
The difference between the FBC and DDT instructions is that each time the DDT instruction finds a mismatch, the processor changes the reference bit to match the source bit. The FBC instruction does not change the reference bit. Use the DDT instruction to update your reference file to reflect changing machine or process conditions.
Make sure there are at least two unused continuous control structures for each FBC or DDT control in the ladder program.
Parameters
The FBC and DDT instructions have the following parameters:
Source
The indexed address of input file.
Reference
The indexed address of the file that contains the data with which you compare the input file.
Result
The indexed address of the file where the instruction stores the position (bit) number of each detected mismatch.
Control
The control is the address of Two continuous control structures. The first control structure is a comparison control, which stores status bits, the length of the source and reference files (both should be the same), and the current position during operation. The second control structure is a result control, which stores the bit position number each time the instruction finds a mismatch between source and reference files.
Operation
These instructions have two search modes. One searches for one mismatch at a time in one program scan, the other searches for all mismatches during one program scan. Both modes of operation are described next:
One mismatch at a time
To enable this mode of operation, set the inhibit bit (.IN =1) in the first control structure either by ladder program or manually before program execution.
With each false-to-true rung transition, the instruction searches for the next mismatch between the input and reference files. Upon finding a mismatch, the instruction stops and sets the found bit .FD in the first control structure. The instruction enters the position number of the mismatch into the result file.
The DDT instruction also changes the status of the reference bit to match the status of the corresponding input bit. The instruction resets the found bit when the rung goes false.
When the instruction reaches the end of the file, the done bit ( .DN of the first control structure) is set. Then, when the rung goes false, the instruction resets:
Enable bit (Bit 15 in first control structure)
Found bit ( Bit 8 in first control structure)
Compare Done bit (Bit 13 in first control structure)
Result Done bit (Bit 13 in second control structure)
Both control counters (Word 2 in both first and second control structure)
All per scan
To enable this mode of operation, reset the inhibit bit (.IN=0) in the first control structure either by ladder program or manually before program execution.
This instruction searches for all mismatches between the input and reference files in one program scan. Upon finding mismatches, the instruction enters the position numbers of mismatched bits into the result file in the order it finds them. After reaching the end of the input and reference files, the instruction sets the .FD bit in first control structure if it finds at least one mismatch. The instruction sets the .DN bit in the first control structure.
If you use a result file that cannot hold all detected mismatches (if the result file fills), the instruction stops and requires another false-to-true rung transition to continue operation. The instruction wraps the new mismatched bit positions into the beginning of the result file writing over the old.
After completing the comparison and when the rung goes false, the instruction resets;
Enable bit (Bit 15 in first control structure)
Found bit ( Bit 8 in first control structure)
Compare Done bit (Bit 13 in first control structure)
Result Done bit (Bit 13 in second control structure)
Both control counters (Word 2 in both first and second control structures)