Reverse parallel logic?

jparale

Member
Join Date
Dec 2014
Location
surrey
Posts
32
Hello,

I was studying a program and this came across to me

B3:4
---------| |-----------
| 9 |
| B3:4 |
-----| /|-----
9

It is part of the program but if I think of it it will just be like a shorted line. so what ever the state of its OTL, the line is always active.

Is there any special meaning for it?

Thanks.
 
Sorry for the logic, it is actually same bit B3:4/9 branched parallel but one is XIC and the other XIO

That is one way of making that section of the rung "always true" without deleting the evidence of what was once there...

Someone decided "hey this contact is a problem or unnecessary in this particular rung, so we don't need it anymore, but just in case I change my mind, or it comes into play later on, here is how I will bypass it." Then, in the future when the underlying reason for the "bypass" changes, like the sensor is repaired or some other root cause, I don't have to go hunting for the right bit to stick back in here, I just delete the branch.

It may have been intended to be temporary or may have been intended to remain that way as a place marker for anyone who comes along and searches for that address.

I have used that same "style" at least a handful of times myself for various purposes.
 
Hello,

I was studying a program and this came across to me

B3:4
---------| |-----------
| 9 |
| B3:4 |
-----| /|-----
9

It is part of the program but if I think of it it will just be like a shorted line. so what ever the state of its OTL, the line is always active.

Is there any special meaning for it?

Thanks.


I've done this is motor logic. I have a template that includes a "Run Permissive" output both for interlocks and for displaying "Ready" status on an HMI. For motors that have no required interlocks, I just make the rung always true by referencing the output in the "AND or AND NOT" logic.
 
As OkiePC and BitBucket pointed out it was probably done to "fix/bypass" a problem or alter a standard template. But there are problems with handling such this way 1) it makes it hard to deterrmine if this was actually done to fix or bypass a problem or alter a standard template, 2) it makes it hard to determine what the normal state of B3:4/9 is suppose to be, 3) it's hard to find these "logic bypasses" in the program and 4) it's hard to figure out if the program has any "logic bypasses" in it at all. There is a better way to handle such issues.

The first rung of all my programs is a bit that is always off called DisabledLogic. The rung comment is - "Disabled Logic bit is used in the program where logic is temporary disabled. Disabled Logic bit allows the programmer to quickly find disabled logic. Disabled Logic bit is NOT used for default programming". Now if someone opens one of my programs, even myself, you can quickly do a search for DisabledLogic and determine if any logic in the program has be "temporary" disabled for some reason. Not only that but knowing the DisabledLogic bit is always off, someone should be able to figure out what the issue is/was by seeing how the DisabledLogic bit is used in the rung. Plus I usually add a comment to the rung as to why it was done.

When it comes to altering a standard template I use the PLC's AlwaysOn and AlwaysOff bits. It makes it easy to see what is altered in the standard template.
 
As OkiePC and BitBucket pointed out it was probably done to "fix/bypass" a problem or alter a standard template. But there are problems with handling such this way 1) it makes it hard to deterrmine if this was actually done to fix or bypass a problem or alter a standard template, 2) it makes it hard to determine what the normal state of B3:4/9 is suppose to be, 3) it's hard to find these "logic bypasses" in the program and 4) it's hard to figure out if the program has any "logic bypasses" in it at all. There is a better way to handle such issues.

The first rung of all my programs is a bit that is always off called DisabledLogic. The rung comment is - "Disabled Logic bit is used in the program where logic is temporary disabled. Disabled Logic bit allows the programmer to quickly find disabled logic. Disabled Logic bit is NOT used for default programming". Now if someone opens one of my programs, even myself, you can quickly do a search for DisabledLogic and determine if any logic in the program has be "temporary" disabled for some reason. Not only that but knowing the DisabledLogic bit is always off, someone should be able to figure out what the issue is/was by seeing how the DisabledLogic bit is used in the rung. Plus I usually add a comment to the rung as to why it was done.

When it comes to altering a standard template I use the PLC's AlwaysOn and AlwaysOff bits. It makes it easy to see what is altered in the standard template.

Not every PLC has an AlwaysOn or AlwaysOff bit. Besides, there's no confusion as to why my run permissive bit is programmed to be always on. The rung comment clearly states that there are no interlocks for this motor.
 
You can always make your own.


A problem with this, is someone later on can re-define your always on/off bits somewhere else in the program.


It is safer to use the PLC Specific dedicated bits, such as the system "Always Off Bit" in Automation Direct PAC's, or a system defined instruction like AB's "AFI".


Neither of those can be changed by any outside influence.
 
I always dedicate B3:0/0 as AFI in AB Programs to use while troubleshooting or to use as a jumper bit.
I also use a (U) or (L) for jumping out portions of a program that are not options associated with the particular machine the program is running in. I list all of them in a ladder called user options an write the comment (U)= HAVE_____ (L) DON'T HAVE_____
Does AB have a dedicated AFI bit already?
 
I prefer to use the AFI for always off and a shorted branch for always on. Mostly because you get warnings for both whenever you verify the logic, so it's a reminder to get around to fixing the problem instead of leaving a band-aid in place.
 
I prefer to use the AFI for always off and a shorted branch for always on. Mostly because you get warnings for both whenever you verify the logic, so it's a reminder to get around to fixing the problem instead of leaving a band-aid in place.

When I was "in charge" of several programmers while working on large projects, I absolutely forbade the use of AFI's and shorted branches, and would simply delete them if I found them.

Instead, each programmer had their own BOOL tag, mine was DB, Fred Scuttle's was FS, Harry Houdini's was HH, you get the idea. These tags were constantly unlatched, so could be used as AFI's (XIC) or on "shorting" branches (XIO).

They could "police" their own temporary markers, to see what work they had left to do or re-visit, and I could keep an eye on their progress, simply by using cross-referencing.

Because I deleted AFI's and shorting branches, they soon learned to follow the rules when their particular piece of code malfunctioned during testing.

Of course a final program should have cross-referenced only the single OTU's, which were left in place for any future site visits etc. This simple system worked exceptionally well.
 
I remember you telling us about this in one of your classes in MK, still do it to this day as I thought it was such a good, simple idea.
 

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