In our PII configuration screen we constantly have an overlap error bit set S:10/12. The processor is a PLC5/40E. We are interrupting the program with an encoder at the approx. rate of 70msec and our processor scan rate is approx. 5msec for the PII. Total scan time is approx. 17-20msec. What are the possible effects on the I/O updates in the program if any? In addition too, does anyone know what they mean when the book states the PII accumulator (S:52) displays the number of conditions that occured before the interrupt and what are the effects on the program if any?
RAS
RAS
