RS 5K Instruction Help-Bitwise And

toddp65

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Aug 2014
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Florence, Ky
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I'm having some difficulty figuring out this code; It;s for our canning line and we're getting nuisance faults at startup with an in-out seamer error.
Part of this code determines what goes into the seamer must come out to identify a jam-up on the inside. There is a photo eye on the discharge.

I'm trying to figure out the bitwise instruction.

The description of the instruction translates to support variable. I'm assuming A is that variable of all ones in each location and B is the actual position of the can relative.

The examples I've seen all have Dest as a result of the two variables so if the only bit that had a 1 in both A and B then it would have a 1 in that sport of 0's in the ones that didn't.

I don't know was they're using the _Dint 512 for.
It seems to be just an array number but I don't see the result of the bitwise.And there.

Any help or insight is appreciated.
 
Bitwise AND compares two DINT values and passes on the result.

Basic explanation:

AND
Source A: 0010 0101
Source B: 0010 0000

RESULT: 0010 0000 (value of 32)

You might want to compare a status word, where bits in the word represent different faults. Depending on what the program is doing, some of those faults might be valid some might not be.

AND
Source A: Status bits of all Faults
Source B: Fault bits to Check Against

RESULT: Faults which are active and configured to be checked against

In your example, the ShiftSeamerRregister[0] have all bits set to true, MSKCtrlINOUTAggraff is a mask, and only cares about the status of bit 9.

The result of the AND is bit 9 being true, which has a value of 512.
 
Thanks--so instead of displaying the binary 1's and 0's, the Dest is showing the actual number equivalent of the binary.

The mask--9 being true because we count left from 0-32? Does it only care about it because it's the only bit that's true?
 
Bits are counted right to left (.31, .30, .29 ... .2, .1, .0)

Because DB1.MSKCtrlINOUTAggraf only has .9 set to true, AND .9 in ShiftSeamRegister[0] is set to true that is all the logic cares about in your screen shot. However, I assume those values change for some reason otherwise this code wouldn't be required, hence the use of NEQ evaluation of _DINT1 versus an XIC of _DINT1.9. Any bit combination between the Source A and B will result in the NEQ evaluation to become true.
 

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