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Old June 29th, 2020, 04:12 PM   #16
sigmadelta
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Quote:
So I wrote CLR on the line after =Q42.0, and above A(, and the logic worked as intended.
With or without CLR made no difference. Maybe he should give the part# and firmware of the CPU. Also, maybe to try only that code in OB1 temporarily..
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Last edited by sigmadelta; June 29th, 2020 at 04:15 PM.
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Old June 29th, 2020, 04:13 PM   #17
mk42
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Originally Posted by kamenges View Post
orense, I want to confirm this statement. Was the value of M7.0 changed or was the state of the RLO at the execution of M7.0 changed? Those are two very different things.

This is the part that I was confused about as well.
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Old June 29th, 2020, 04:16 PM   #18
kamenges
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But based on what sigmadelta is seeing it doesn't look like it should matter.

Keith
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Old June 29th, 2020, 05:49 PM   #19
L D[AR2,P#0.0]
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To clarify - a new network will not affect the logic processing. Example:
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File Type: jpg rlo.jpg (65.8 KB, 26 views)
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Old June 30th, 2020, 11:55 AM   #20
kamenges
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Quote:
Originally posted by L D[AR2,P#0.0]:

To clarify - a new network will not affect the logic processing.
That is completely different than what I would have thought. So what does separate logical units? Is it the assignment? That would mean you wouldn't be able to make multiple assignments as a result of a single logic segment so I suspect it is something else. I would have thought it was the network indication but apparently not.

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Old June 30th, 2020, 03:35 PM   #21
L D[AR2,P#0.0]
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From the siemens help on STL
Code:
/FC        First Check Bit (Status Word, Bit 0)
 The /FC bit signal state controls a logic operation string.
 The /FC bit is status word bit 0.
 Each logic operation queries the /FC bit signal state and the
 addressed contact.
If the /FC bit signal state equals 1, an instruction
 logically combines the result of its signal state check on its
 addressed contact with the RLO generated since the first check
 and stores the result in the RLO bit.
 If the /FC bit signal state equals 0, the logic string
 begins with a first check.
 The logic string ends and the /FC bit is set to 0 with
 the assignment of a value (S,R,=) or with a RLO-dependent jump instruction.
The =,S,R instructions use the current value of the RLO but do not modify it, hence you can have as many assignments as you like at the end of a logic "string". The first check comes into play with the first logic operation after the assigments.
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