FIFO Load and MOV conflict

locotumbler

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I have a camera system in a die that I am writing the program for.
I have two tracks and capture two consecutive parts.
The part out locations are 8 and 12 stations after my earliest parts in each track respectively.
I move a 1 (good) or 0 (bad) into the source location for the FIFO stack. on the next progression.
If the part had a good image at the first image it can fail a different measurement on the next station. Am I able to move a zero into the start of the FIFO stack after the source bit has been loaded in? Or would I be better off:
1. Running two seperate FIFO stacks and having my retraction output looking for both of the fifo unload bits to be positive
2. move the 0 into a different bit then move it into the position after the fifo stack stack start. I have proven that I can move the bit into N7:29 without an issue and have it remain through the FIFO sequence.



Please see the attached code. and mock of what i mean with the lanes.

fifo order example.JPG
 

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  • NEEDLE CAMERA 15JULY 0856.zip
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What plc are you using?


in my opinion, you will need 2 fifo load / unload systems. that way you can keep up with the systems easier. I have only done 2 fifo commands, so I am not that experienced, you might search my posts, I got help from this site developing them.
james
 
If you are only using boolean values it might be simpler to just use a DINT as a shift register. Smack your values into bit 0, multiply by 2 reset bit 30 to stop if overflowing. You can do anything you like with the bits then.
 
It looks like there are two lanes called 1 and 2, and

  • the rising edge of I:0/4 means
    • the new part arrives at [lane 1/station 0] and has a pass/fail result from (from camera 1?) in N7:0 (1 = pass; 0 = fail)
      • N7:0 is pushed onto the FIFO at #N7:10
    • the new part arrives at [lane 2/station 0] and has a pass/fail result (from camera 1?) in N9:0
      • N9:0 is pushed onto the FIFO at N9:10

So N7:0 and N9:0 represent the current pass/fail state of camera 1?



Other comments

  • maybe the program is not done, but from what I can see N7:0 and N9:0 will always have the same value, and so one of those is redundant
  • The FIFO address is N7:10 for the FFL and N7:20 for the FFU; I think they should be the same address.
  • The rising edge of I:0/4 triggers both the FFLs and the FFUs on the same scan, so the FIFOs should always be empty (Position values = 0) after the FFUs, and the FFL/FFU pairs are reduced to an edge-triggered MOV, and no FIFO.
    • Yet the Position values shown are greater than 1.
      • Huh? Did you preset the Position values?
    • What is the meaning, in the process, of a rising edge on I:0/4?
  • C5:1.DN is tested on Rung 0016, but C5:1 is not used in any counter.
PDF of the .RSS program is attached, in case anyone else wants to browse the code easily.
 
locotumbler said:
What details can I add to help with?
Click to expand...


What does the process actually look like?


There are two lanes in the process; are there two cameras per lane, or two cameras total for the entire process?


What are inputs from the process? Also, how do the inputs behave? For example, you have cameras that issue 1/0 inputs for pass/fail (or fail/pass): does the last pass/fail result remain on that input, or is it only valid when some other input is in a certain state (0/1/rising-edge/falling-edge)?


What are outputs to the process?
 
Last edited:
locotumbler said:
How is a bit shift different than a fifo?
Click to expand...


Bit shift



A bit shift is used when parts** move through a process synchronously. That is, when a new part enters the process, another part exits the process*; so the number of parts in the process is fixed and constant*. Also, a bit shift represents some property of each part with one bit**.


* even if there are actually no parts in the process, e.g. at startup every morning, the model treats the process as if there are that fixed number in the process; how the bits in the bit array shifted by the BSR/BSL instruction are assigned for that start case is controlled by the program as designed by the programmer.


** and each bit may not represent one "part," it may represent the presence or absence of a part in a space that a part could occupy that is represented by each bit e.g. on a conveyor where the spaces are continually being added at the beginning and removed at the end.




FIFO (FFL/FFU pair)


A FIFO s used when parts enter and exit a process asynchronously. That is, the number of parts currently in the process starts at zero and may vary, and there are typically separate triggers for


  • the FFL when a part enters the process, and
  • the FFU when a part leaves the process
That said, a FIFO could be used for a synchronous process i.e. that has a fixed number of parts in the process, but to allow the process to fill, the FFU trigger should be muted until the fixed number is reached e.g. with a test on Control Position

Code: 
XIC I:0/trigger    GEQ R6:0.Position 8    FFU...
Also, a FIFO represents some property of each part with a word (unsigned 16-bit integer).


For your process, you could represent the two camera states as two bits in the Int e.g. [camera 1:1/0=pass/fail] could write to N7:0/0, and [camera 2:1/0=pass/fail] could write to N7:0/1; then N7:0=3 would indicate both cameras passed the part; anything else would indicate that at least one camera failed the part.
 
Last edited:
drbitboy said:
It looks like there are two lanes called 1 and 2, and

  • the rising edge of I:0/4 means
    • the new part arrives at [lane 1/station 0] and has a pass/fail result from (from camera 1?) in N7:0 (1 = pass; 0 = fail)
      • N7:0 is pushed onto the FIFO at #N7:10
    • the new part arrives at [lane 2/station 0] and has a pass/fail result (from camera 1?) in N9:0
      • N9:0 is pushed onto the FIFO at N9:10

So N7:0 and N9:0 represent the current pass/fail state of camera 1?



Other comments

  • maybe the program is not done, but from what I can see N7:0 and N9:0 will always have the same value, and so one of those is redundant
  • The FIFO address is N7:10 for the FFL and N7:20 for the FFU; I think they should be the same address.
  • The rising edge of I:0/4 triggers both the FFLs and the FFUs on the same scan, so the FIFOs should always be empty (Position values = 0) after the FFUs, and the FFL/FFU pairs are reduced to an edge-triggered MOV, and no FIFO.
    • Yet the Position values shown are greater than 1.
      • Huh? Did you preset the Position values?
    • What is the meaning, in the process, of a rising edge on I:0/4?
  • C5:1.DN is tested on Rung 0016, but C5:1 is not used in any counter.
PDF of the .RSS program is attached, in case anyone else wants to browse the code easily.
Click to expand...

N7:0 is driven by I:0/2
N9:0 is driven by I:0/2

At this point yes they will be the same value.
When I:0/0 is not on it will change the value of the N7 stack.

When I:0/1 is not on it will change the value of the N9 stack.

There is one camara that sees 4 parts (2 per lane) I am limited to 3 outputs as that is all the camera has hence why I am driving the start of both FIFO stacks by the same input.

This is added on a stamping press running at 200spm with outputs based on the position of the camshaft (0-359 degrees)

I have two different outputs coming from the press. One that is going straight to the camera to trigger an image capture.
the second one is to the PLC I:0/4.

The two lanes are used becuase the point of where I want to have the die react to the cameras findings are at two different locations, that is what I was attempting to show in the picture attached to the original post.

This is my first time ever using FFU and FFL commands. I was playing around with the locations in the N7 table to get an understanding of what the commands did. Once I got it to work after a number of pulses I left it alone.
 
Last edited:
the main difference between a FIFO and a Bit Shift is the a FIFO works with a array od words you can move and value into the words and they are shifted up the stack as it is loaded. a FIFO need both a LOAD and UNLOAD to work they load util the index equals the max array count then you must unload the FIFO now you can play some games with the index to get it to work without the unload i don't recommend it unless you have more experience with them
A bit shift only works with the bits in a word or multiple words it only need a shift right or shift left any bits that are shifted out of the words are simply lost
in your case i am not sure exactly what you are doing it looks like one lane, the parts are picked up at 2 points and each part is inspected with a camera at 2 separate locations and removed at 2 separate locations based on a good or bad flag from the inspection points are the rejects just allowed to fall off the end of the conveyor
a picture of the line would help or a detailed drawing would be better
 
I have figured out a solution. I will add a PDF of the code when I get a chance. I basically ended up moving a 1 into a bit if the part failed and a 0 into a bit if it passed based on I:0/0 and a seperate bit setup for the I:0/1 input on the stroke of the press.

Then on the next stroke from the press (I:0/4) it subtracts that value from the N7:28 for I:0/0 and did the same thing for N9:15 for I:0/1

I then changed my EQU to a LEQ command so If I end up with a -1 in the position it will still retract the punch.
 
GaryS said:
the main difference between a FIFO and a Bit Shift is the a FIFO works with a array od words you can move and value into the words and they are shifted up the stack as it is loaded. a FIFO need both a LOAD and UNLOAD to work they load util the index equals the max array count then you must unload the FIFO now you can play some games with the index to get it to work without the unload i don't recommend it unless you have more experience with them
A bit shift only works with the bits in a word or multiple words it only need a shift right or shift left any bits that are shifted out of the words are simply lost
in your case i am not sure exactly what you are doing it looks like one lane, the parts are picked up at 2 points and each part is inspected with a camera at 2 separate locations and removed at 2 separate locations based on a good or bad flag from the inspection points are the rejects just allowed to fall off the end of the conveyor
a picture of the line would help or a detailed drawing would be better
Click to expand...

It is in a stamping die so the parts remain connected to the strip. It is a bit out of the norm for what I am doing.

thank you for your explination on the difference. I've done it in the past where I have a single firing bit and a whole string of MOV commands.
i.e. move b3:1 to B3:2, then B3:2 to B3:3..... and then just perform compares. I was looking to get outside my normal patterns to expand what I am able to do.
 
locotumbler said:
... I've done it in the past where I have a single firing bit and a whole string of MOV commands.
i.e. move b3:1 to B3:2, then B3:2 to B3:3..... and then just perform compares. ...
Click to expand...




That " move b3:1 to B3:2, then B3:2 to B3:3....." is a bit shift (BSR or BSL).



What seems to be unique about the process in the OP of this thread is that there are two bits (literally and metaphorically) of information to carry along.


One way to handle that with a single BSR/BSL would be to shift two bits - the camera findings - onto the array during the PLC program scan when the parts' movement is detected (I:0/4?). That would require unlatching the Control .EN bit after the first BSR/BSL so the second sees a rising edge.


Then make the bit array longer than either lane, and read the bits from one position of the bit array for the short lane, and from the later position of the bit array for the longer lane.
 

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