Any way to make an AND gate in RSlogix?

opmal7

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This might be the wrong terminology, but basically I have 3 values I want to compare, 2 integers from the PLC and a known value (0). So, if N1:0 AND N1:1 are both 0, I don't want the rung to execute. Either one of them can be 0, so long as they are not both 0. There's probably an easy way to do this, but I'm struggling to find the right instruction.
 
I want to allow values of <0, >0, and 0 in either of the variables (not both).

The only condition that should not allow rung continuity is if N1:0 and N1:1 are both 0.

Yes. Should have specified GT rather than GEQ compare. I think that there is also an EQ compare function available.
 
Maybe I'm missing something, but I'm not following the logic.

If I use 2 GT, or EQ instructions I don't see how that accomplishes the goal. If I use the GT instructions, it doesn't allow for any negative numbers, which I want to allow.

If I used 2 EQ in series, if either one is 0, the rung won't execute.
 
N1:0 NEQ 0 OR N1:1 NEQ 0 (in parallel branches) would work at the beginning of the rung. If both are 0, the rung won't execute, but if one of them is anything other than zero, negative or positive, the rung will execute.
 
Last edited:
N1:0 NEQ 0 OR N1:1 NEQ 0 (in parallel branches) would work at the beginning of the rung. If both are 0, the rung won't execute, but if one of them is anything other than zero, negative or positive, the rung will execute.

I think that should do it. Thanks for the tip!
 

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