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Old September 5th, 2018, 04:11 PM   #1
carlostana8437@gmail
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Math status flag not assigned within the rung.

i tried to use S:V bit today but keep getting the error.

Math status flag not assigned within the rung.

i am using studio5000
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Old September 5th, 2018, 04:29 PM   #2
Dravik
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I haven't seen that error exactly but the newer processors only support the S:V bit being in the same rung as the instruction you are checking.
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Old September 5th, 2018, 06:48 PM   #3
Geospark
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Quote:
Originally Posted by Dravik
I haven't seen that error exactly but the newer processors only support the S:V bit being in the same rung as the instruction you are checking.
Yes, at Studio 5000 v27 this little "enhancement" was added. But more specifically, you can only add math status flag instructions, such as XIC S:V, on a rung where the arithmetic instruction(s) you are checking precedes the math status flag instruction. Any rung arrangement where the math status flag is examined before the arithmetic instruction(s) is invalid and will not verify.

1023320 - Math status flag behavior change in Studio 5000 version 27
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Quote:
Originally Posted by carlostana8437@gmail
...i am using studio5000
Are you using Studio 5000 v27 or newer?

Regards,
George
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Old September 10th, 2018, 11:40 AM   #4
carlostana8437@gmail
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Quote:
Originally Posted by Geospark View Post
Yes, at Studio 5000 v27 this little "enhancement" was added. But more specifically, you can only add math status flag instructions, such as XIC S:V, on a rung where the arithmetic instruction(s) you are checking precedes the math status flag instruction. Any rung arrangement where the math status flag is examined before the arithmetic instruction(s) is invalid and will not verify.

1023320 - Math status flag behavior change in Studio 5000 version 27
Access Level: TechConnect



Are you using Studio 5000 v27 or newer?

Regards,
George

V30+. i used to be able to use S:V without a math instruction before it but now it wont let me. is there a work around this.
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Old September 14th, 2018, 12:24 PM   #5
Geospark
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Quote:
Originally Posted by carlostana8437@gmail
V30+. i used to be able to use S:V without a math instruction before it but now it wont let me. is there a work around this.
No. There is no direct workaround. If using Studio 5000 Logix Designer v27 or newer you must place an arithmetic instruction, which will produce a math status flag, before any instruction instances which will consume a math status flag (S:V, S:C, S:N, or S:Z).

As an indirect workaround, you can use the S:V operand in an instruction after the intended arithmetic instruction, as they now expect you to do, and then at the end of the rung assign a user-defined overflow condition BOOL tag to an output instruction.

Example:

XIC Execute_ADD ADD myTagA myTagB myTagC XIC S:V OTE myADD_SV

If the ADD instruction were to overflow, then myADD_SV will be set to "1".

Then, where you would like to use the S:V operand for overflow status, for this particular arithmetic instruction, you can use myADD_SV instead and no arithmetic instruction needs to be present on the rung.

If you need to add a general S:V operand, where you need to evaluate if any overflow is active, to a rung where there are no arithmetic instructions, then you could create a DINT tag Prog_SV especially for user-defined overflow status for the particular program. The DINT will provide 32 x BOOL tags for use as individual user-defined overflow tags. These BOOL tags are then used throughout the program similar to the example above. You can then compare the entire DINT as an integer value (GRT>0) and if one or more of the overflow BOOLs within the DINT are set to "1" then the DINT value will be a non-zero value. This evaluation could set a BOOL tag, say Sys_SV. The status of Sys_SV should then tell you if there is currently any overflow conditions in the program, similar to how the S:V operand would tell you.

There may be other considerations if attempting to implement this or indeed other methods, but that is the bones of it.

Regards,
George
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