Ab Slc 1 Second Pulse Generator

69FIREBIRD

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Oct 2004
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New Zealand
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Hi, I’m looking for some feedback on the best way to develop a one second pulsed (one shot) internal bit that is as accurate as possible, I am using this bit to increment (ADD) 1 to integer addresses each time the bit is true, these integer addresses are then used as timers with a 1 second time base throughout the program. Why not just use timers? My rational is to set up something similar to the user defended datatables in ControLogix (albeit limited). Within an integer file the first 10 words are addressed at bit level, the next 10 are addressed at word level for timers, the next 10 for counters, floating points can also be dealt with buy multiplication factors and stored within the integer file, etc. Along with this the file contains all the data relevant to a ladder file of the same number i.e. ladder file 10 is associated with integer file N10 therefore code written within a particular ladder file for a step in a process or individual component has a ladder file associated to it that also has an integer file associated with that which contains all the bit, timer, counter, HMI data, etc related to that step/component.



I have looked at the following:



NEQ S:42 N7:30 OSR N7:3/0 BST OTE N7:3/1 NXB MOV S:42 N7:30 BND



BST TON T4:0 0.01 99 16 NXB XIC T4:0/DN BST OTE N7:3/4 NXB RES T4:0 BND BND



Neither of which are accurate over time.



The best I have found so far is to use the STI interrupt on a 1 second base to scan a file that latches on the second pulse bit and then unlatch it at the end of the program scan, the problem I can see with this is that if the STI occurs part way through a scan then all references to the second pulse bit prior to that will not have seen the latched bit before the end of the scan.



Any Advise or feedback would be appreciated.

 
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Thanks, but my first sample code uses the seconds word in the status file, I was comparing it to a stored reference when it wasn’t equal to that reference i.e. had incremented by one I performed a one shot of my 1 second pulse bit and updated the reference. It does not keep accurate time, perhaps its own up date or scan issues?
 
Zero the PLC clock and reset counters and timers with one shot in PLC code. Use counters (C5) to monitor 1-second pulses. Over time (i.e. 30-45 min) note number of second pulses accumulated and compare to minutes X 60, also use external stopwatch as check on PLC time clock.



With a 45min sample should have had 2700 (45*60) 1 second pulses –



S:42 comparisons netted 2499 counts

T4:0 time on 100th second time base and 100 preset netted 2712 counts

STI file on 1000mS execute, latching bit and unlatching at end of scan netted 2699 counts ( the most accurate) but this has implications for missing sections of the program when called part way through a scan.
 
"Time-of-day clock accuracy Resolution 1 second; +/- 1 minute/month @255 C
+0, -6 minute @ 60 degrees C

Real-time clock Resolution 10ms; better than 0.1%
accuracy"


So it looks like the free running clock (real time clock)has better accuracy, but I've had a look and there is no bit that toggles on exactly one second.

NB: Have started to look at RHC (Read High Speed Clock) and TDF (Compute Time Difference) instructions with F8 references and GEQ (Greater than or Equal)to set 1 second pulse and reset RHC. Looks OK but not tested fully, welcome other feedback.
 
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If the STI accuracy is 'good enough', set the latch bit as before but don't do the timer logic 'til the start of the following scan.

scan X - STI sets latch sometime during scan

scan X+1 - if latch set, timer logic executed near top of program; reset latch

wait one second
 
Hi, tried the RHC and TDF instructions and found that the most accurate method is still the STI routine on 1000mS.

Final code - run an STI every 1000mS, in that file a single rung of logic latches a bit. At the beginning of a new main program scan if that STI latched bit is set then latch another bit "SECOND PULSE" that is used throughout the main program and unlatch the STI bit. At the end of one complete scan (i.e. the rung prior to latching the "SECOND PULSE") if the "SECOND PULSE" bit is latched then unlatch it. wait for the next STI latched bit to latch the "SECOND PULSE" again.



Thanks to all for your feedback.
 
If you're worried about cumulative innacuracy, this is how I overcome it:


-------------- TON T4:0, 0.01, 600, 0

GRT T4:0.ACC 100---------( )1SEC_1SHOT

1SEC_1SHOT
---] [--------------------SUB T4:0.ACC, 100 T4:0.ACC


Just set t4:0.pre to a value it can never reach (100 plus watchdog value is what I use), and keep the above rungs in the order listed for maximum accuracy. I usually put 'em on the same rung with branches so that the timer is evaluated making the .acc word accurate just before the subtraction occurs.

If the pulse interval repeatability is required to be perfect, the STI is the only was to go as you have seen. minimize the amount of code in the STI to minimize the impact it may have on overall scan times. A busy STI can result in an erratic overall scan cycle which may affect other controls. Watch the scan time peak closely when making changes to an STI.

I use logic like the above for long duration timers, using the 1shot to increment "seconds counters" for various conditions including alarms and production projections. It is more accurate than resetting off the DN bit. Doing that you lose the accumulator overflow if any exists. So your individual pulses can be "off time" by as much as the peak scan time, but the number of pulses you get over the course of time will be correct. In 1000 seconds, you will get 1000 pulses.

Using the STI to drive the same logic will be the ultimate in accuracy, but unless your are triggering a high speed local output, I don't know why you could not tolerate an error in timing of a few ms. The "CLOGIX STYLE UDTS" you describe should be able to tolerate a little variation in the timing of each pulse up to the PLC scan rate, without using the STI...unless you are ultimately driving a very high speed local output...

PC
 
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