bernie_carlton
Lifetime Supporting Member + Moderator
This ia a response to SCOTTMURPHY's inquiry regarding Alaric's observation in the thread titled 'Push Bottom' (How's that for an intro?)
Ladder Logic in PLC's attempts to emulate in a computer the control functions illustrated in the electrical diagram called a 'ladder diagram' because of the vertical power rails at the left and right side coupled with horizontal cross connections. In general power is switched by various contacts to a final device which may or may not be energized based on the logical connections which preceeded it. An observation is, that in actual wiring, ALL the logic is being solved simultaneously except for transit time of contacts and deliberately introduced timer delays.
A computer's CPU (unless it is a huge multiply parallel device) can only solve one logic connection at a time. The question is how to translate the solution in a way which closely emulates the real world.
One method, used by Modicon and apparently Twido if Alaric's observation is correct, is to plot each logic contact (and this includes wire tying for ANDing and ORing) in a fixed set of memory represented by a rectangular array. Each location hass associated memory points representing INPUTS to the logic and OUTPUTS. The'Array Solver' as Alaric put it (and I hadn't heard this term either) starts in the upper left corner of a group of logical contacts. The solution works DOWN the left hand column until it reaches the bottom of the rectangular area (which Modicon calls a 'network') then continues at the top of the column to the right and works down again. Once it has completed the entire rectangle it continues on to the next network. At each logical square the solver gathers the inputs, solves the simple logic, and sets the outputs to the indicated state. Note, in many networks there may be many squares which have no logic at all. This 'empty' area still takes up memory. Closer to the right hand side of each network are the 'outputs' (real-world or internal conditions).
Another form of ladder solving doesn't really involve a 'ladder' structure at all. The code is just presented in a graphical 'ladder' format for easier entry and understanding. The AB format does include concepts of 'Start of Run (SOR)'. Click on an AB rung to see the actual text involved. Are basically the codes you enter manually plus some (like the Start Of Rung) which are 'entered' by the act of beginning a new rung. The Automation Direct ladder logic doesn't include commands to begin rungs. There are commands however which can only be placed at the left hand rail. The actual commands used can be seen by viewing the 'Mnemonic' form of the code (though it can't be edited directly in this form). In both AB and AD the sequence of solution is the actual sequence of the mnemonic commands which are generated. Part of the solution requires 'remembering' previous logical states as branches are formed then rejoined. The logical states are stored on a 'stack' of which Alaric speaks. The are taken off and used in later portions of the rung, primarily when branches merge again.
The differences between these two methods of solving a group of logic can cause much confusion (believe me, I know) and becomes a vital point to check when evaluating a new PLC. I think I'll let others take over from here, correcting my mistakes as needed.
Ladder Logic in PLC's attempts to emulate in a computer the control functions illustrated in the electrical diagram called a 'ladder diagram' because of the vertical power rails at the left and right side coupled with horizontal cross connections. In general power is switched by various contacts to a final device which may or may not be energized based on the logical connections which preceeded it. An observation is, that in actual wiring, ALL the logic is being solved simultaneously except for transit time of contacts and deliberately introduced timer delays.
A computer's CPU (unless it is a huge multiply parallel device) can only solve one logic connection at a time. The question is how to translate the solution in a way which closely emulates the real world.
One method, used by Modicon and apparently Twido if Alaric's observation is correct, is to plot each logic contact (and this includes wire tying for ANDing and ORing) in a fixed set of memory represented by a rectangular array. Each location hass associated memory points representing INPUTS to the logic and OUTPUTS. The'Array Solver' as Alaric put it (and I hadn't heard this term either) starts in the upper left corner of a group of logical contacts. The solution works DOWN the left hand column until it reaches the bottom of the rectangular area (which Modicon calls a 'network') then continues at the top of the column to the right and works down again. Once it has completed the entire rectangle it continues on to the next network. At each logical square the solver gathers the inputs, solves the simple logic, and sets the outputs to the indicated state. Note, in many networks there may be many squares which have no logic at all. This 'empty' area still takes up memory. Closer to the right hand side of each network are the 'outputs' (real-world or internal conditions).
Another form of ladder solving doesn't really involve a 'ladder' structure at all. The code is just presented in a graphical 'ladder' format for easier entry and understanding. The AB format does include concepts of 'Start of Run (SOR)'. Click on an AB rung to see the actual text involved. Are basically the codes you enter manually plus some (like the Start Of Rung) which are 'entered' by the act of beginning a new rung. The Automation Direct ladder logic doesn't include commands to begin rungs. There are commands however which can only be placed at the left hand rail. The actual commands used can be seen by viewing the 'Mnemonic' form of the code (though it can't be edited directly in this form). In both AB and AD the sequence of solution is the actual sequence of the mnemonic commands which are generated. Part of the solution requires 'remembering' previous logical states as branches are formed then rejoined. The logical states are stored on a 'stack' of which Alaric speaks. The are taken off and used in later portions of the rung, primarily when branches merge again.
The differences between these two methods of solving a group of logic can cause much confusion (believe me, I know) and becomes a vital point to check when evaluating a new PLC. I think I'll let others take over from here, correcting my mistakes as needed.
