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Old January 13th, 2021, 03:54 PM   #1
Lare
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TIA portal code optimization

On old Siemens 300/400 series memory was usually saved if code was writed with ST or SCL instead of FBD or ladder.


Now I tryed this with TIA / 1500 PLC.
Changed lot of ladder to SCL coding for saving memory on FB-blocks. (There is couple FB blocks which are called several hundred times)



After compiling result was that STL and SCL coding used even more memory than original ladder coded FB-blocks.


This maked me to think that TIA compiler makes optimization behind for all program languages and it is difficult to save memory if changed to STL.


So what are ways to make code use less memory.
I have lot of IEC timers with constant time inside FB-block.


Should I use old S5 timers instead of IEC-timers (S5 timer number as input to FB)?
Would S5 timer instead of IEC-timers make any difference for work memory use.

And what are cons for using S5 instead of IEC.

Is scan time longer for S5 timers?



Is there any other ways to save FB / load memory use on TIA.
Not interested to change PLC to bigger.

Last edited by Lare; January 13th, 2021 at 04:01 PM.
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Old January 13th, 2021, 06:25 PM   #2
L D[AR2,P#0.0]
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Without seeing your code, your question is too general to give specific advice.

Start with your blocks ordered in size of load memory and tackle the biggest ones first.

You might consider rolling your own timer, for example if you do not need the ET you could eliminate it, do you need a #time for the time or could you use an integer instead?

I'm sure you can experiment with S5 timers to see the memory usage difference. How many S5 timers does your CPU support, is it enough?
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Old January 13th, 2021, 06:27 PM   #3
Jobbe9000
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Hi,

In Step 7 LAD and FDB is compiled into STL, and then into machine code.
In the TIA portal LAD, FDB, STL & SCL is compiled directly into machine code.
That might be what is tricking you

Take a look at the programming guidelines from Siemens.
Siemens programming guidelines
®
The part about how the code is compiled, is also described in there.

Are you not able to expand the load memory, by changing the SD card to a size bigger, when using a 1500 PLC?

Last edited by Jobbe9000; January 13th, 2021 at 06:30 PM.
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Old January 13th, 2021, 07:31 PM   #4
m_turk
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Maybe put the FBs you can in a cyclic OB and increase "time" instead of using timers..

also, I guess it is a stupid question, but your blocks are optimised, right?
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Old January 14th, 2021, 02:26 AM   #5
L D[AR2,P#0.0]
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To clarify, which to you want to reduce, load memory (size of memory card) or work memory (determined by CPU spec)?
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Old January 14th, 2021, 03:04 AM   #6
kalabdel
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Post a screen shot of your memory usage.
Which version of TIA? Earlier versions used more memory for certain SFBs like SINA blocks and updating to later versions reduced memory considerably.
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Old January 14th, 2021, 03:11 AM   #7
Lare
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It is code work memory where is problem.
Mem card has over 90% free (load mem).
Data work memory (DB) have also plenty of free mem.

TIA 16.




Allready tryed using ints for counting time.
ADDing integer with pulse uses more code work memory than IEC-timer blocks.




CPU has 2048 S5 timers according datasheet, more than probably ever needed.

Last edited by Lare; January 14th, 2021 at 03:19 AM.
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Old January 14th, 2021, 04:36 AM   #8
L D[AR2,P#0.0]
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I created several blocks using different timers, the IEC timers use the least work memory.


Do you have any scope for using arrays of timers?
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Old January 14th, 2021, 05:22 AM   #9
Lare
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Quote:
Originally Posted by L D[AR2,P#0.0] View Post
I created several blocks using different timers, the IEC timers use the least work memory.


Do you have any scope for using arrays of timers?

I have FB blocks and IEC timer is inside of stat area now, so I don't need on program now huge amount of different DB-blocks for seperate timers.


Examined more of memory use. If I take IEC-timers completelly off from multi used FB-block, total mem usage don't go much smaller on whole program



Still, L D, I see that you have one timer whit quite small work mem.

How FB5 is coded?
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Old January 14th, 2021, 05:24 AM   #10
L D[AR2,P#0.0]
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Thats the INT timer called by FB6 - nothing for free there


Might be something in FB9, I'll post soon.
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Old January 14th, 2021, 05:35 AM   #11
L D[AR2,P#0.0]
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When using IEC timers, accessing the Q of the timer updates the timer, so no need to put a call to the timer in. Set the PT in the STAT data for the timer so no need to transfer that at run time. E.g.
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Old January 15th, 2021, 02:10 AM   #12
Lare
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Quote:
Originally Posted by L D[AR2,P#0.0] View Post
When using IEC timers, accessing the Q of the timer updates the timer, so no need to put a call to the timer in. Set the PT in the STAT data for the timer so no need to transfer that at run time. E.g.



Thanks for the tips.


Anyway, I tryed this timer methed. Effect to overall work mem usage had allmost zero effect.


Then I tryed also change some 30 old S5 timers to IEC TONs.
I located them to inside FB blocks static areas and multi instance


Overall effect was that PLC now uses little bit more work memory than with S5 timers.


It is little bit weird.
I assume that using IEC timer with multi instancing uses little bit more memory than locating every timer to seperate DB instance.
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Old January 15th, 2021, 02:22 AM   #13
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I understand you have already determined that the memory is mostly occupied by IEC timers and that's why you are trying different work around.
How did you determine that? Just curious.
I'm also curious to see a screenshot of the memory usage. I want to see which FBs or DBs are using the most memory.
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Old January 15th, 2021, 06:30 AM   #14
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To my experience, same code uses approx 50% more memory in S7-1500 than it did in S7-300. Not a big deal.

In S7-1500, there is lots more memory reserved for data than there was in S7-300/400.

Quote:
Originally Posted by Lare
On old Siemens 300/400 series memory was usually saved if code was writed with ST or SCL instead of FBD or ladder.
Very little memory usage is saved in this way. Far more important is that you chose the language that suits the programming task. For general logic, Ladder is superior to SCL even in TIA.

Quote:
Originally Posted by Lare
Changed lot of ladder to SCL coding for saving memory on FB-blocks. (There is couple FB blocks which are called several hundred times)
This makes no sense at all. SCL wont save any code memory over Ladder.

Quote:
Originally Posted by Lare
So what are ways to make code use less memory.
Apart from keeping things simple in general, there arent any ways worth pursuing (*)
PLCs nowadays have much more memory than in the old days. It is more important to have code that is easy to understand, troubleshoot and maintain than to try and save a little memory.

Quote:
Originally Posted by Lare
I have lot of IEC timers with constant time inside FB-block.
Data memory usage is independant of the language. Nothing has changed for this in TIA over STEP7 Classic. Use IEC timers as multiple-instance. There is lots of data memory available for data.

*: Programming FBs that are used many times with individual instances per call actually saves code memory. But that is not the reason for using FBs. The advantage of FBs is that you reuse the same code many times, so any changes will automatically effect all instances.
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Last edited by JesperMP; January 15th, 2021 at 06:33 AM.
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