Detailed scan question for Rockwell Logix PLC

IEC 61131-3 Edition 3 8.2.7 "Order of network evaluation" Under 8.2 "Ladder Diagram" might tell us the correct order to execute branched output coils.

I do not have access to this standard.
 
comparing apples to apples ...

if you're really interested in "which arrangement runs faster" between the various programming styles, there's a simple test that you can run if you have a "spare" system available to experiment with ...

start a new program – and add the first two rungs shown below ... note that the timer rung is UNconditional – and that the ADD instruction will only increment while the TON timer is "timing" ... I generally use 30 seconds (30,000 setting) for my test period ... note that the TON instruction will automatically "reset" itself when the processor has a "go to run" event ...

once you have the two "test bench" rungs set up, then put in whatever arrangement of rungs, branches, and instruction patterns you want to test ... (one arrangement at a time of course) ... then put the processor in the PROGRAM mode – and manually set the value of COUNT_SCANS to ZERO ... and next be sure to

GO OFFLINE ...

do NOT try the experiment while you are online (communicating with the processor) – because the communications will affect the scan times ... this will give you meaningless "scatter shot" readings ...

once you're offline, then use the processor's KEY switch to put the processor into the RUN mode ...

once the processor is running, wait offline for AT LEAST 30 seconds (anything longer won't matter) and then go back online and see how many scans were made ... frankly I'm always amazed by how "repeatable" the scan counts are when I run the same test three or four times in a row ...

for examples, here are the readings that I got using a 1756-L55 processor with RSLogix5000 version 16 ...

1st place (fastest - shown below) ... instructions in series on one rung ... 124341 ... 124336 ... 124340 ...

2nd place ... one rung with parallel branch levels ... 124183 ... 124189 ... 124186 ...

3rd place ... one rung with "upside-down wedding cake" branch levels ... 124136 ... 124135 ... 124148 ...

4th place ... four separate unconditional rungs ... 124069 ... 124074 ... 124076 ...

stating the obvious: the higher the count - the faster a particular programming style is being processed ...

party on ...
.

SPEED_TEST.jpg
 
Last edited:
do NOT try the experiment while you are online (communicating with the processor) – because the communications will affect the scan times ... this will give you meaningless "scatter shot" readings ...


On the logix5000 platform, communications are handled in the System Overhead Time Slice - and providing you DO NOT have the check-box checked to "resume normal scan during unused time-slice", the online comms should not affect the scan times.


But then again, I am sometimes proved wrong....
 
the online comms should not affect the scan times.

I left all of the "time slice" settings at their defaults ...

I just made three runs of the "fastest" test again - this time while ONLINE through the AB_ENET-1 driver ...

123727 ... 123715 ... 123703 ...

so - still pretty repeatable - but definitely less scans than while OFFLINE ... specifically - there is some "slow down" of the scans while communicating ONLINE ...

then I made three runs of the same "fastest" test - but this time while ONLINE through the AB_DF1-1 driver (using the processor's serial port) ...

89427 ... 89959 ... 89914 ...

my conclusion is that ONLINE communications ARE slowing down the scan times ... and pretty drastically through the serial port ... and worst of all - the test results are basically "scatter shot" in this situation ...

so ...

I still recommend that this type of test be performed OFFLINE for the most reliable results ...
 
Last edited:
the fastest I've got in my lab gear is an L75 - and I'm not at my lab this week ... maybe someone else can run an L8 model for us ...

I'm definitely interested in the results ... but then again - that's not the point of the original question posed in this thread ... I'm pretty sure that we've got an answer to that one ...

peace ...
 
Testing aside, I think you should always allow for someone, possibly more than one, being online. You don't want your code or processor "failing" because it can't handle online sessions.


I did my own testing a different way to Ron's. I set up 5 separate subroutine files...


1. No code at all (used as a "baseline")

2. Inline code (same as Ron's)
3, Parallel Branched
4, "Nested" Branched
5, Separate rungs


I then set up a "count" (ADD 1, MOD,5) to cycle through 0 to 4, and used this value to execute one of 5 FOR instructions, calling each of the subroutine files a large number of times (30,000 in my case).


By GSV'ing the LASTSCANTIME, I can calculate the time each code type takes to execute.


Being "online" throughout should impose the same "overhead" to all iterations equally.


Result1 is the "inline" code - fastest
Result2 is the parallel-branched code - second fastest
Result3 is the nested/branched code - third fastest
Result4 is the 4 separate rungs - slowest


It can be seen that from "fastest" to "slowest", is a difference of approx. 9mS, but remember there are 30,000 executions of the code in that time.


In conclusion, there is a difference, and the inline code wins it, but it is hardly a storming win !!

2018-05-22_140557.jpg
 

Similar Topics

Good Afternoon , I have the free version of CCW. Version 11. What is the latest version ? Also , is there a version that is purchased that...
Replies
18
Views
6,419
Hi all, we are assembling an industrial control panel which consists of 4 branch circuits supplied from panel feeder as follows: Panel feeder ...
Replies
5
Views
5,154
I'm looking for a detailed wiring diagram for an Allen-Bradley 1492-IFM40F-FS-24A-4 (IFM module) . See the attached file. It may be from an AB...
Replies
12
Views
4,492
Hi All, I'm trying to use OpenOPC (and like everything else under the sun) to connect to an Iconics HMI OPC Server. It works fine from my Laptop...
Replies
8
Views
3,348
I've studied the white paper by MJ Melfi of Reliance Electric and am persuaded that the equivalent circuit he offers as Figure 3 is valid for a...
Replies
36
Views
25,240
Back
Top Bottom