Converting DINT to INT in Logix w/o causing FAL Error

RonJohn

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We just completed the conversion of a PLC 5/80 to a 1756-L8x processor. The old 5 program had numerous MSG instructions sending data to/from other PLC5s. Most all of the MSGs were sending INT data.

The converted CLX program changed all of these data tables into DINT array tags, which is fine. For any of these being sent to a PLC5, I then used an FAL instruction to convert the DINT elements as an INT array buffer prior to executing the write MSG.

A problem occurred as some of the old PLC 5 registers were used for boolean data storage rather than integer values. So, if N10[0].15 = 1 in the Logix program, the FAL instruction would error out trying to convert 32768 to an INT.

I ended up working around this by finding the dozen or so DINT elements where this was an issue and added a rung of logic to essentially mimic the value of bit 15 to bits 16-31 in that same element. This didn't seem very pretty but it got the job done.

Are there any instructions perform this conversion or other/better ways to avoid this error that I didn't come up with in my moment of crisis? Thanks in advance.
 
This may be a stupid suggestion, but why not just leave all of the old PLC5 words as INTs instead of DINTs? I know DINTs are technically more efficient but we're talking microseconds here.
 
rupej, not necessarily a stupid suggestion. The potential benefit of increased numeric range for literally thousands of tags is worth the change when compared to what I had to do to a dozen or so tags. Kinda like sticking with BCD in a PLC2 to PLC5 conversion; no thanks! :)

Besides, this wasn't noticed until after the conversion was being commissioned. We've crossed the Rubicon at that point.
 
If there aren't that many, what's wrong with AND'ing the DINT with FFFFh and plopping into an INT?
 
If there aren't that many, what's wrong with AND'ing the DINT with FFFFh and plopping into an INT?
šŸ™ƒ

That's the kind of catch-all that I was racking my brain for the other day! Actually, that should work within an FAL instruction for mass conversion as well as with brute force for just a few. I'll have to give that a try. Thanks!!!
 
A problem occurred as some of the old PLC 5 registers were used for boolean data storage rather than integer values. So, if N10[0].15 = 1 in the Logix program, the FAL instruction would error out trying to convert 32768 to an INT.

I tried this method and did not get the same results. When I set the [0].15 bit of the DINT the INT value shows -32768 and no Error on the FAL.

Which makes sense since the range of an INT is -32768 to 32767

FAL_Copy_Logic.PNG

FAL_Copy.PNG

FAL_Copy_INT.PNG
 
:unsure:Hmm...

Using Studio 5000 V30.00 with an L81 processor. I expected to get what you got but got what I mentioned instead.
 
Your Control word has an alias? I have never done that. So you made an array of control Words? Interesting! I used 5562 and version 20. I will try making an alias for control to see if I get the same result.
 
The control word alias was just for a demo rung I made up to keep it "simple". The FAL instructions in my running project were simple tags of type CONTROL (not array, nor aliased). Same unfortunate result in each case.

FYI: I create an array of TestInt, TestDint, TestReal, etc. for all of my new projects. They come in handy for just such an emergency!
 
OK... This is interesting. I ran a test on a 1756-L71 running V20.12, which is basically what I have running in an earlier PLC5 conversion.
Bit 15 set works as cwal61 shows in his example.

Test_FAL_v20.JPG

TestDint_v20.JPG

TestInt_v20.JPG

As you can see, not only does bit 15 transfer as I'd expect but bit 16 (set in elements 2 & 3) doesn't cause the FAL to error out either.

I'm in contact with A-B tech support on this and will let you folks know what they come up with.

I think I just discovered a "feature" in v30. (y)
 
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INT values in Logix processors (and PLC 5, and SLC 500) all have a 'range' of -32768 to +32767. They are not unsigned.
I totally agree. The issue is that the FAL works differently in my newly converted v30 system than it does in my v20 system which was converted a few years ago.
 
It's a 5580/5380 series processor "feature"

OK folks, here's the scoop from Rockwell:

Back in the pre-5580 series processors, they still used minor error bits such as S:N, S:V, S:Z, which would allow the FAL instruction to execute, throw up an overflow flag but not indicate which element in the FAL caused the overflow.

With my 1756-L81E, math status bits are no longer generated. Instead, the .ER bit is set and the operation is aborted in order to indicate the offending data's location.

It's spelled out on page 103 of this reference manual as referenced by tech support. It would've been really nice if the sales staff had mentioned the existence of this manual when they gave their presentation on this wonderful new piece of processing equipment instead of lauding how much faster & more powerful it is. o_O

I'd strongly recommend that you all digest this manual before utilizing one of the new 5580/5380 processors. Hopefully my experience will save some headaches.

As for me, I'm probably going to work on developing an AOI to automatically mimic the status of bit 15 onto bits 16-31 (to ensure the value stays within the -32768/+32767 range) prior to converting DINT to INT. We have more PLC5's to convert so this issue won't be going away soon.

Caveat Emptor
 
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