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Old January 6th, 2018, 05:13 PM   #1
Jerry Ferrell
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First Scan reset with Compact/Controllogix

My new friend Ron Beaufort got me thinking about the issues with using OTL's in regards to a power cycle. While you can use a first scan bit (s:fs) to clear entire output tables, what about non aliased/"internal" bits?

Is there an (easy) way to set all OTL's to 0 on first scan? (Currently experimenting on CompactLogix system)
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Old January 6th, 2018, 05:27 PM   #2
lpc921
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I just create an initialisation routine and in it manually create OTUs for each bit I need to clear on power-up. That's one of the reasons why OTE should be preferred over OTL/OTU.
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Old January 7th, 2018, 12:52 AM   #3
Jerry Ferrell
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OTL's vs OTE

I've been working a lot with Beckhoff and Modicon where you can use an initialization value on power up. But from now on with Allen Bradley I think I have to swear off OTL's completely because of not having the control of them at power up. (Without extra programming) With AB I think latch branches are the only way to go.
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Old January 7th, 2018, 01:30 AM   #4
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Quote:
Originally Posted by Jerry Ferrell View Post
I've been working a lot with Beckhoff and Modicon where you can use an initialization value on power up. But from now on with Allen Bradley I think I have to swear off OTL's completely because of not having the control of them at power up. (Without extra programming) With AB I think latch branches are the only way to go.
You should use OTL for boolean things that need to be remembered through a power cycle. They also have a few other good applications.

They are often abused, and it is generally better to use a sealed in OTE for things you want the PLC to turn off on first scan.
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Old January 7th, 2018, 08:11 AM   #5
Ron Beaufort
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one size does not fit all ...

here's some light reading material from days gone by ...

http://www.plctalk.net/qanda/showthr...27&postcount=1

quick summary:

sometimes you want the machine to REMEMBER that there is a "part in place" or that there is a "log in position B" ...

Seal-In type rungs might work PERFECTLY for these types of situations AS LONG AS THE POWER STAYS ON in normal day-to-day operations ...

the big question becomes: "Will the machine be able to REMEMBER those conditions when the power is finally restored after a power failure?" ...

so ...

the machine works and it "meets the specifications" ... the programmer gets paid and goes on to another project ... time marches on ... and then one day the power fails while the machine is operating ... later the power comes back on again - and the machinery crashes ...

why? ...

obviously the damage was caused by the "POWER SURGE" associated with the power failure ...

or ...

but maybe NOT so obvious is that the programmer never considered whether a "seal-in" rung would act differently than a "latched/unlatched" arrangement ...
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Last edited by Ron Beaufort; January 7th, 2018 at 08:27 AM.
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Old January 7th, 2018, 08:20 AM   #6
Ron Beaufort
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and while we're on the subject - here's a thought for those of you who prefer STX (Structured Text Programming) ...

you might want to consider the difference between

:=

(which is a "retentive" assignment)

and

[:=]

(which is a "non-retentive" assignment)

many STX programmers never know there's a difference - until the Allen-Bradley has an unexpected "go to run" situation ... depending on the type of machinery being discussed, we could potentially have a "lawyer level" situation on our hands ...
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Old January 8th, 2018, 08:07 AM   #7
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Another consideration if you want to use S:FS to reset latched bits....

Each Program has its own S:FS bit, that is acted upon on the first pass of that program.

If an early program inspects a latched bit from a program that is later in the program schedule, or from a program that is inhibited, that bit will not yet have been reset by the S:FS code.

This could lead to unexpected operation.

My pictures show two programs, Program1 and Program2....
Both Program1_BitBox and Program2_BitBox are controller-scoped tags...

I start, in Program mode, with both bits toggled ON, and Trap_Bit OFF.

When I change to RUN mode, you can see that Program1 sees Program2_BitBox as ON, and latches the Trap_Bit. It is not until Program2 is executed that Program2_BitBox is unlatched.

This could have dangerous consequences, depending on how the bits are inter-related between programs.

As Ron has pointed out, it's a case of "horses for courses"... If you definitely want a bit to be turned OFF when the processor enters Run-mode, then program it as "seal-in" latch logic. If you definitely want the bit to retain its state when the processor restarts, then use OTL/OTU combinations of the bit in your logic.
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Old January 8th, 2018, 10:58 AM   #8
keshik
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Quote:
Originally Posted by Ron Beaufort View Post
and while we're on the subject - here's a thought for those of you who prefer STX (Structured Text Programming) ...

you might want to consider the difference between

:=

(which is a "retentive" assignment)

and

[:=]

(which is a "non-retentive" assignment)

many STX programmers never know there's a difference - until the Allen-Bradley has an unexpected "go to run" situation ... depending on the type of machinery being discussed, we could potentially have a "lawyer level" situation on our hands ...
Ron - I assume that this is specific for the Allen-Bradley implementation, correct?

I remember with Wago and Schneider having to locate the tag in retentive memory for it to be retained (using any Codesys programming language).
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Old January 8th, 2018, 12:46 PM   #9
alive15
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I've asked a similar question; a few people posted some good examples in my thread here: http://www.plctalk.net/qanda/showthr...=103493&page=1
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Old January 9th, 2018, 06:33 AM   #10
Ron Beaufort
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question from keshik:

Quote:
Ron - I assume that this is specific for the Allen-Bradley implementation, correct?
yes, and more specifically - with the RSLogix/Studio 5000 software ... for the (much) older Allen-Bradley PLC-5 systems using RSLogix 5 software, the "retentive" assignments in Structured Text programming were taken care of differently ... see Example H ...

http://www.plctalk.net/qanda/showthr...9&postcount=21

as we've already noticed, one size does NOT fit all - not even when considering different platforms from the SAME manufacturer of PLCs ...

and for those who might be interested, here's a thread from WAY BACK that compares Allen-Bradley's method with Automation Direct's method of handling retentive and non-retentive memory ... just for comparison ...

http://www.plctalk.net/qanda/showthr...86&postcount=1

note: this is the sort of thing that I find amusing when folks say: "If you can program ONE make of PLC - then you can program them ALL" ... that's sort of like saying: "If you can speak English, then you can also speak German, Spanish, or whatever" ... well, maybe - but not without a considerable amount of work and effort ...

party on ...
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Old January 9th, 2018, 07:56 AM   #11
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It is also worth noting that even instructions can behave differently, from the same manufacturer, across different platforms.

Here's just one example....

The instruction that decodes a 4-bit Binary Coded input into a number is called FRD (From BCD).

In Logix500 (SLC etc.), it will only recognize the encoded numbers 0 to 9, anything else presented on the 4 inputs is flagged as an "overflow", and the overflow trap bit is set. This can cause problems with the processor faulting out, unless the overflow trap bit is reset before the end of the ladder scan. On a BCD thumbwheel switch, (depending on the manufacturer), it is possible to generate "illegal" BCD codes as the wiper moves between two indents.

In Logix5000 (ControlLogix, CompactLogix etc.), FRD decodes the whole of the possible 4-bit combinations, and then gives the decimal number equivalent to the 4-bit HEX (not BCD) code.

0 to 9 works as expected....

0000 = 0
...
1001 = 9

but going on from there, this is what happens...

1010 = 10
1011 = 11
1100 = 12
1101 = 13
1110 = 14
1111 = 15

In effect the FRD is actually an "FRH" (From HEX).

I have seen Logix5000 controllers major fault if the "BCD" 0-9 is used as the index into a 10-element array, because the non-BCD numbers (which can occur between the 0-9 indents), are decoded, and the index tries to address an array element that doesn't exist.

You have to pay special attention when up-converting Logix500 to Logix5000
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