How to do 32 bit counting in a SLC500.
Spaderkung is right, you need to do this with integers.
You can do this with 16 bit integers and a feature on your SLC 5/05 that will let you do 32 bit math using two consecuitve N registers. That will let you track encoder pulses accurately up to 2.1 billion.
Its not hard, in fact the program is very simple, but here is the kicker: the low order 16 bit word will be an unsigned integer, but the data monitor is going to show it as signed, or negative, so it might be helpful to use the binary or hex radix instead of the decimal radix.
You need to use the S:2/14 bit to permit 32 bit math. Normally, when an overflow occurs the destination address usually contains either 32767 or -32768 and it does not wrap around. Setting S:2/14 lets it wrap around. But that gives us another kicker: The S:2/14 bit is asserted only when going from program to run or only at the end of the scan, so latching and unlatching it won't produce the expected results, set it using the data monitor before downloading. Using the S:2/14 bit changes the way overflows are processed, it might (I stress might) mess up the way your program normally handles overflows if you are currently trapping and responding to them. If you don't trap and resopond programatically to overflows elsewhere in the program then there is probably nothing to worry about, but something like
MUL N7:30 N7:31 N7:32
GRT N7:32 15000 OTE B3/xx
could bite you if N7:32 overflows. With S:2/14 clear N7:32 would be 32767 on overflow - no problem for the following comparrison. With S:2/14 set, N7:32 could go negative on overflow - whic is a problem for the following comparrison. You'll have to evaluate the implications for the rest of your program. Refer to the instructions set reference manual for more information on using this bit.
As long as the encoder count since the last addition is < 32767, add the encoder count to the low order word. Each time the carry bit is set add 1 to the high order word. 300,000,000 is 11E1A300 in hexadecimal. So by comparing the high order word to 11E1 and the low order word to A300 we can determine if we have reached 300,000,000 counts - we need to take care that we include the sign bit as a part of the comparrison (A300 would be negative in decimal radix and the PLC would evaluate the comparrison as true prematurely)
I've attached an example. I wrote it for a SLC5/04 that I keep on my desk. I put the PLC into single scan mode and tested it one scan at a time, adding 5000 at at time to make sure it was working. Then I set the high order word, N7:0 to 11E0h and ran several single scans to test the comparrison. It latches a bit when 300,000,000 is reached and clears the 32 bit counter.
EDIT:
I just noticed this.
Rung comment 3:0000 should be corrected to read
The 32 bit word is stored in N7:0 and N7:1. N7:0 is the high order word (bits 16-31), N7:1 is the low order word (bits 0-15).