Impossible becomes possible, Please help with this tia portal code.

[thewalkerist]

Hello, Now here is my problem guys. I weigh my weight and i wait for the slow_fill_required_weight to be lesser than my slow fill limit which is 1500. After that has been done i check if my step_7 is activated or not. If its not activated then cool i can go yes? cool.


Now on to the 6th Step. On my 6th Step i check if my weight is bigger than my required amound or not. If it is then randy-dandy coolio i can go on to step-7. Cool but wait a minute. Why am i still in step-6? Whats going on? And why is my step 7 looks energised but down it doesnt give out any energy? Can you please help me? How is this possible?

 

[Chris Taylor]

thewalkerist


Check you are not writing to %M1.4 elsewhere in the program. Its what usually happens to cause this sort of thing. I'm not sure if TIA portal has a double coil check.

 

[thewalkerist]

I even put out the equals and put timers, no change. Somehow it seems stuck in step-6

 

[thewalkerist]

thewalkerist


Check you are not writing to %M1.4 elsewhere in the program. Its what usually happens to cause this sort of thing. I'm not sure if TIA portal has a double coil check.

I gave it a different memory and it worked. Thank you so much sir.

 

[JesperMP]

thewalkerist.
Using Merker addresses is risky for exactly this reason.
You can check if there are overlapping addresses by calling the cross reference F11, and selecting "Show overlapping access". It is one of the icons in the menu bar at the top of the view.
But the correct remedy is to not use Merkers, except for legacy code or 'quick-and-dirty' program changes that are added only temporarily.
Use DB addresses instead, which makes unintentional overlapping access practically impossible.

 

[mk42]

Use DB addresses instead, which makes unintentional overlapping access practically impossible.

In theory, yes.


In practice, I can't count the number of times I've found programmers new to the Siemens Way who had created an array of bools in an FB to use for edge detection, and then started using them in the instance DB outside the FB. Thus half the bits were double used, nothing was working, and they couldn't understand why. What's scarier is that some of them SEEMED like they were working....



Fortunately, the cross reference tool is more likely to find something like that now, but for a while internal and external references to the instance were completely separate.

 

[JesperMP]

In practice, I can't count the number of times I've found programmers new to the Siemens Way who had created an array of bools in an FB to use for edge detection, and then started using them in the instance DB outside the FB. Thus half the bits were double used, nothing was working, and they couldn't understand why. What's scarier is that some of them SEEMED like they were working....

That is not overlapping addressing, but I see what you mean.
When you come from a legacy PLC with only flat global data memory, and you come to a modern PLC, there should be at least an introductory course. How memory is structured is one of the most important lessons.

 

[L D[AR2P#0.0]]

MB0 and MB1 are often assigned to the clock bits and status bits generated by the CPU - check these settings in the CPU