Question against teachers opinion on book info

Neopreza7828

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We are in a mechatronics class currently learning the beginnings of PLCs. There are a few things I think we are being misinformed on and I'd like to get some clarification.

So first off is the drawings for XIC and XIO.. he says the book has it backwards in that XIC being shown as --| |-- he is saying it should be --|/|-- and vice versa for XIO.

Secondly, there is a table that he claims is wrong but can't explain why, I will try to explain it below

"If the data table bit is:" "The status of the instruction is:"
XIC XIO OTE​
Logic 0
False True False​
Logic 1
True False False​

He is saying the Logic 1 for OTE should be true. Can anyone explain to me why? I'm trying to learn best I can. Apologies if this is confusing how I have detailed the questions
 
If I understand correctly what you are saying, the teacher, "Dr. Boolean," is wrong and needs to watch Ron Beaufort's series here: https://www.youtube.com/watch?v=T3tnXu-Eywc&list=PLB1ACAF773A15BFB1


[XIC bit]

  • if the input rung is True,
    • [XIC bit] will set the output rung True if the value of bit is 1
    • [XIC bit] will set the output rung False if the value of bit is 0
  • if the input rung is False,
    • [XIC bit] will set the output rung False, independent of the value of bit
[XIO bit]

  • if its input rung is True,
    • [XIO bit] will set the output rung True if the value of bit is 0
    • [XIO bit] will set the output rung False if the value of bit is 1
  • if the input rung is False,
    • [XIO bit] will set the output rung False, independent of the value of bit
Therefore, the output rung of the either sequence

  1. [XIO bit XIC bit]
  2. OR
  3. [XIC bit XIO bit]
will ALWAYS be false, because

  • if bit is 1
    • then the output rung of the XIO must be False in both cases,
      • In case 1, this means the input rung to the second instruction, the XIC, is False, so the output rung, from that XIC, must be False even though the value of the bit is 1
      • In case 3, this means that, even though the input rung to the second instruction, the XIO, is True, the final output rung will be False
  • if bit is 0
    • then the output rung of the XIC must be False in both cases
      • In case 1, this means that, even though the input rung to the second instruction, the XIC, is True, the final output rung will be False
      • In case 3, this means the input rung to the second instruction, the XIO, is False, so the final output rung, from that XIO, must be False even though the value of the bit is 0.
Caveats

  • if there are any mistakes in that explanation, hopefully someone will find them.
  • there is a special case if the tag [bit] is an alias for a discrete I/O, and I/O scans are asynchronous with program scans, where a different result is possible, but that is a special case that I am intentionally ignoring.
  • The sequence [XIC always_0 XIO always_0 OTE always_0] is a common technique to assign the value 0 a bit, so it will be 0 throughout the scan assuming it is not written to elsewhere.
Get out of that class and go watch Ron's series; you will learn more, correctly, in 2h, or even the first 5 minutes of the first video, than weeks in that class.

The images below are adapted from the Rockwell Automation/Allen-Bradley Logix 5000 Instruction Set manual; I think the people who make the PLCs may be a better source for the correlations between =] [=, -]/[-, XIC, and XIO.





xxx.png

yyy.png
 
Last edited:
XIC is supposed to represent "Examine if Closed", which is represented by a normally open contact -| |-. The thought is that the bit is true if the device is active, aka closed when compared to a relay contact. XIO is supposed to represent "Examine if Open", which is a normally closed contact -|/|-. This bit will be true if the device is inactive (off). It can be confusing, but it looks to me like your instructor is not correct in his explanation.
Regarding the logic, if you have opposing contacts of the same address in series, then the result of that logic is an output device that is off (false or off).
 
If you have an PLC editor in class. Just open it, insert rung, insert xic xio and ote. If you click on the line most good plc editors will give you the ASC representation that is described above.
 
So first off is the drawings for XIC and XIO.. he says the book has it backwards in that XIC being shown as --| |-- he is saying it should be --|/|-- and vice versa for XIO.

The book is correct; the standard terminology is XIC ('examine if closed') for --| |-- and XIO ('examine if open') for --|/|--

The instructor may be coming from experience with electrical schematics and getting confused by the similar symbols of 'normally closed' and 'normally open' which are the opposite. Regardless of the reason, he's wrong.

Secondly, there is a table that he claims is wrong but can't explain why, I will try to explain it below

"If the data table bit is:" "The status of the instruction is:"
XIC XIO OTE​
Logic 0
False True False​
Logic 1
True False False​

He is saying the Logic 1 for OTE should be true. Can anyone explain to me why? I'm trying to learn best I can. Apologies if this is confusing how I have detailed the questions

What is the logic being examined? It sounds like it is asking about a situation where we have the following logic
Code:
       Bit 1      Bit 1      Output
--------| |--------|/|---------( )---------
and are considering the situations where Bit 1 is false (Logic 0) and true (Logic 1). If this is the case, the instructor is incorrect.

An XIO and an XIC for the same bit in series will never produce a true output. Consider the following example of that exact logic: "If the tank level low sensor is On AND the tank level level low sensor is Off THEN the pump is turned on." When will the pump be on? When the low level sensor is both on and off at the same time, which is impossible. The pump will never turn on.
 
This is all amazing info, and I appreciate it all!! I will go check out that series and share this thread with my classmates. This misinformation has led me here to this community and I can certainly be thankful for that!
 
Yeah, your instructor is confusing the electrical symbols as being the same as the ladder logic symbols. It's a common mistake. But not typically for someone identifying as an instructor. His take on the logic is wrong and his take on the instructions themselves is wrong.

The XIC and XIO symbols are intended to look familiar to those already familiar with relay logic. Note, that word "look" in there. It looks familiar, but in real usage, it has nothing to do with normally open and normally closed contacts. In fact, they are NOT contacts at all. They are logic instructions. The videos mentioned earlier do an excellent job of showing the difference.

When (if) you approach your instructor with this information, be tactful. Approach him/her individually, not in front of the class. Give them a chance to correct themselves to the rest of the class. If they fail to recognize your correction, then update your classmates. But preferably not in front of the instructor.

These two little instructions have been one of the biggest causes for confusion in the lifetime of PLCs. As an instructor, I always said that I would prefer someone have no experience with the terms normally open and normally closed. Otherwise, they had to sort of "unlearn" those terms and the symbols.

People think differently, and our past experiences can lead us down the wrong path very easily. I'm sure your instructor is a smart person. They just have been confused by this one little item.

OG
 
If you have an PLC editor in class. Just open it, insert rung, insert xic xio and ote. If you click on the line most good plc editors will give you the ASC representation that is described above.

+1

Using Studio or RSLogix 500, double click or edit the rung and type XIC and hit enter... a NO contact will show up on the rung

XIC.png
 
I always describe XIC as asking "Is this bit a 1 ?
And XIO as asking is this bit a 0?
How the bit became a 1 or 0 doesn't matter.
 

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