Any news on Studio 5000 Designer V34 yet?

drbitboy said:

LOL. Zilog z80 (8080+, IIRC) and 8085 early experiences here.

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I still have that Heathkit H-8--soldered together by my father and I. Reviving it is on my bucket list. /:

Aardwizz said:

My wild guess is that it's even more complex than that. In single rung mode, the PLC can assemble/test the logic while the routine isn't being scanned.

But with AOIs scattered everywhere throughout the code, when can that happen? How do you ensure that the scan isn't in the middle of an AOI call when it's paused, so that you aren't effectively causing BOTH pre- and post edits to solve, creating wild results that could break the machine?

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Meh, I don't think that is much more dangerous than any other online edits.

I think each task would have to have a stored definition of the AOI and so that they can each update in between scans asynchronously.

Local distributor says release is around August 2022.

JeremyM said:

Local distributor says release is around August 2022.

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Yeah I was told similar, bumped form January time frame to April-June timeframe. No official slides on what's new yet.

V34 was Bumped?

:/ probably nothing helpful in it anyway though

dmroeder said:

Yeah I was told similar, bumped form January time frame to April-June timeframe. No official slides on what's new yet.

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What they said so far. There's some other bits and pieces of bug fixes in the knowledgebase if you search for v34 there.

• PanelView 5000’s will support Web Browser via HTML5 webpages and IP cameras with V8 of View Designer (View Designer is part of Studio 5000)
• Possible HART device configuration directly from Studio 5000
• No Windows 7 and 32-bit OS support (same with FactoryTalk View, AssetCentre, Historian latest releases)
• 1756-EN4TR support in main chassis

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The PanelView 5000s are becoming more interesting. Not sure what is meant by the EN4TR.

JeremyM said:

Not sure what is meant by the EN4TR.

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EN2TR:

EtherNet/IP communication module, dual port, 10/100M twisted pair, 128 TCP connections

EN4TR:

EtherNet/IP communication module, dual port, 10M/100M/1G twisted pair, 512 TCP connections, 256 axes

The “support in main chassis” is what I meant.

Got a reply:

As for the EN4TR, currently it cannot reside in the same chassis as a 1756-L8xE processor.

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JeremyM said:

The “support in main chassis” is what I meant.

Got a reply:

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What do you mean it can't reside in the Main Chassis with L8E??
I'm Confused because how have about 10 of the in the same chassis some with more than 1 en4tr

There may be a corner case or something, then. Perhaps it's outdated information.

I've yet to use an EN4TR and L8x together.

JeremyM said:

There may be a corner case or something, then. Perhaps it's outdated information.

I've yet to use an EN4TR and L8x together.

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10-4
I just wanted to make sure i wasn't going to see a bunch of problems down the road.

EN4TR note is related to the ControlLogix Redundancy systems.
In V33 Redundancy EN4TR supported in I/O chassis only.

I’m eagerly awaiting any new feature news or release notes. I’m going to email our distributor for anything they might know.

From a programming POV:
- I cautiously welcome more object-oriented features. It demands more programmer responsibility, but so be it.
- I want to be able to write actual functions and not AOIs masquerading as them.
- Function overloading. I don’t want an AOI for a DINT array, INT array, and so on.
- Support for adding more routines than prescan/postscan/enableinfalse to AOIs. This ought to be easy.
- I would love the ability to alter the Logix compiler’s linkage behavior, such that one could pick and choose inline expansion vs normal function calls. I get why Rockwell basically defaults to inline (study a controller’s memory use when you call an AOI or simple function on another rung if you don’t believe me).
- That would necessarily get into static constructs and stuff like race conditions among periodic/continuous tasks, but so be it. My risk, my reward.

JeremyM said:

I’m eagerly awaiting any new feature news or release notes. I’m going to email our distributor for anything they might know.

From a programming POV:
- I cautiously welcome more object-oriented features. It demands more programmer responsibility, but so be it.
- I want to be able to write actual functions and not AOIs masquerading as them.
- Function overloading. I don’t want an AOI for a DINT array, INT array, and so on.
- Support for adding more routines than prescan/postscan/enableinfalse to AOIs. This ought to be easy.

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All would be nice, all won't happen. I gave up hope.


My Rockwell rep basically said that Rockwell doesn't want anymore Object oriented features they want to keep the language syntax as simple as possible so Maintenance can understand it.......

Anyway you wrap it rockwell doesn't want to invest in Studio 5000.

Further several Rockwell people have told me that Rockwell does not view machine builder or SIs as their customers, so they don't care what they want or think. they only view end user's as their customers.

Further they are entirely a sales driven Org. Engineering has no say in anything they work on. it is completely driven by what the sales division things will generate more revenue.

Is this surprising no, but I just want everyone to know that this isn't speculation, it comes from people that work at Rockwell.

And it will never change as long as people are to scared to push back when their customers ask for Rockwell equipment.

Use Codesys based PLCs if you can. Codesys is for big boys and girls.

Sales should know that there's demand for it.

Sales should also know that "Maintenance understanding it" doesn't hold water against encrypted (and deliberately obfuscated) AOIs that emerge from many OEMs. In even more advanced or integrated systems, dedicated motion controllers or custom hardware found in specialized equipment don't have that baked it.

I am so dying for features that I'm willing to see 'A-series' processor lines introduced with said features available. The above included, but with more memory out-of-the-box, a dedicated segment of memory for dynamically instantiated objects (the program running this would hard fault on memory exceptions, rather than the entire processor), and so on.

Beckhoff looks juicy, Codesys-capable stuff, also.