confuse about false to ture transition

I am using the RSlogix500, and want to show
the BCD data. What I am going to do is to shift tens, hundreds and thousands digits to the first four bits and enable the designation bit one by one for showing.

I have to use BSR, CTU, JMP and LBL to make more bits shift, but the false to true transition for BSR and CTU is really confusing me! I put Bit file bit B3:1/1 in front of BSR, put R6:3/DN of BSR in front of CTU, put C5:1/DN in front of JMP, is that working for more bits shift? Thank you very much for giving some suggestions.

BTW, how to show the ladder logic in this forum.

James

It's what he's asking for....

You certainly are doing things the hard way, but I'll try to help you accomplish what you say you are doing, rather than what you should be doing.

A) You are using the LBL-JMP instructions as a Basic/C For-Next loop. You want loop through the Count / Shift code 4 times to get the 10's bits into the 1's place, the 100's into the 10's, etc. This is a guess, and I shouldn't have to guess. Please try to post a clearer explanation of what you are trying to accomplish.

2) When a CTU (as well as a BSR) instruction have a False-to-True transition, it "does it's thing" (namely incrementing the .ACC value and checking to see if the .DN should be set). But it only does it on the FIRST INSTANCE of the rung being True. For as long as it reamins True, the CTU instruction will "know" that it has "done it's thing", and so won't do it again until the rung first goes to False, and then back to True.

iii) When you loop, you are most likely (since this is the usual beginner's mistake) not providing any way for the rung to go False, therefore the counter won't increment, therefore the counter is never done, therefore you keep looping, until the watchdog timer times out.

Does this describe the problem you are having?

There are several potential solutions:

d) The way that the CTU instruction "knows" that this is the scan that has the False-to-True transition is via the "enable" bit (/EN). It the CTU wasn't previously enabled but the rung condition is True, this must be the time to "do it's thing", and so it increments the .ACC, and sets the /EN bit. If you were to unlatch (OTU) the /EN bit, you effectively make the CTU instruction think that it didn't do anything last scan, when in fact, it did.

V) Another method is to introduce another condition like "Add performed last loop" which would be wind up toggling ON-OFF-ON-OFF each time you went through the loop.

6. Or you could just bag the counter and use the ADD instruction instead. The ADD will increment every scan when the rung is True. But then again, there are better instrucitons for what you are trying to accomplish anyway (such as FRD-DIV-TOD).

Of course, once you get it working, you'll have to make sure that it doesn't work, otherwise the BCD numbers are just going to scroll right off the display (in about 100 msec). But that's a different issue.

<hr>

To post ladder, first put the vB tags [LADDER ] and [/LADDER ], and then draw the rungs in ASCII using dashes, 'pipe' symbols ('|') or whatever. Like this:

       2b            ?

---+---| |---+------( )

   |         |

   |   2b    |

   +---|/|---+

.

Very interesting!

(1) for your first potential solution, you mean I can unlatch CTU/EN after one bit shift with BSR, and also unlatch BSR/EN after CTU working, so the LOOP can move forward until CTU/preset is reached, we don't care about the false to true transition for the rung.

(2) I have no idea about "Add performed last loop", could you introduce it in more details?

(3) Use Add instruction instead of CTU is a good idea.

I am just thinking about each scan procedure, read input---execute the program --- output, right? what's the definition of input? It's only the physical input or means all the | | instructions. Why I ask such questions is if I put physical input I:0/2 in front of CTU, for a false-to-true signal on I:0/2, CTU is working for this scan, if I loop CTU still in this scan, the false-to-true transition is satisfied compared with last scan, is it reasonable? or just like you said when CTU/EN is set, it is no working until the rung is set from false to ture.

Many thanks,
James

dong2 said:

(1) for your first potential solution, you mean I can unlatch CTU/EN after one bit shift with BSR, and also unlatch BSR/EN after CTU working, so the LOOP can move forward until CTU/preset is reached, we don't care about the false to true transition for the rung.

Click to expand...

I got that one wrong - it's the /CU bit, not the /EN bit that you unlatch to allow a counter to repeatedly count.

(2) I have no idea about "Add performed last loop", could you introduce it in more details?

Click to expand...

This would be a bit that you would program to ensure that there was a True-to-False transition every other scan. You could create an "every-other-scan" bit:

  E-O-S    E-O-S

---|/|-----( )

or you could compare the .ACC it to the value last time in the loop:

   +--- NEQ ---+     No Add last scan

---| C5:0.ACC  |---+----( )

   | N7:0      |   |

   +-----------+   |   +--- MOV ---+

                   +---| C5:0.ACC  |

                       | N7:0      |

                       +-----------+

or some other way. There are probably as many ways as there are programmers.

(3) Use Add instruction instead of CTU is a good idea.

Click to expand...

I wasn't sure how committed you were to using only the instruction set you listed (BSR, CTU, JMP, LBL). It seemed like an assignment. "Using only a hammer and screwdriver, build a table leg" - when obviously a lathe is the right tool for the job.

I am just thinking about each scan procedure, read input---execute the program --- output, right? what's the definition of input?
It's only the physical input or means all the | | instructions.

Click to expand...

When the PLC "Reads the Inputs", it turns its attention away from the PLC program, and talks to the circuitry that is wired to the real-world devices (pushbuttons, switches, relay contacts, etc). If the voltage at that point is High, it writes a '1' in the input table which corresponds to that circuit. If the voltage is low, it writes a '0'. Once it's done with each circuit in it's turn, it goes back to the program for one scan. If an circuit voltage goes High after the PLC has examined that particular circuit, or during the program scan, the input table isn't changed until next scan.

There are exceptions to this (AB's ControLogix, simulation logic), but that's the basic principle.

Why I ask such questions is if I put physical input I:0/2 in front of CTU, for a false-to-true signal on I:0/2, CTU is working for this scan, if I loop CTU still in this scan, the false-to-true transition is satisfied compared with last scan, is it reasonable? or just like you said when CTU/EN is set, it is no working until the rung is set from false to ture.

Click to expand...

The biggest problem you'll have with your scheme is that the PLC will run your little program in about 10 msec before scanning the inputs and running the program again. Unless that input is only ON for ONLY those 10 msec (unlikely), the PLC will execute the logic again, and the numbers will shift for a second time. (BTW: 10 msec is a wild guess on my part - it could be only 2-3)

Take a look at the One-shot instruction (OSR). Think about how you might use it.

very appreciated!