RS LOGIX5000 Overflow unlatch

Anybody can tell me, how to clear or unlatch the overflow bit on RSLOGIC 5000 programming software?

your solution is on page 417 of manual 1756-pm001_-en.pdf i tryed to print the image but is too big, so please go to www.ab.com page and download this manual.

Here is AB's manual regarding Major and Minor Faults:

Logix5000 Controllers Controller Major and Minor Faults

Thanks

Thanks a lot for your reply.

Just a note, there is almost no reason to do this on a Logix based platform, unless you are particular about having 0 minor faults.

Overflow does not cause a major fault at end-of-scan as it did in the PLC/SLC series.

I ususally track down the cause of the overflows (usually an un-checked divide, that may divide by zero), and then manually add bounds-checking to prevent the occurrance. That to me is a better solution, as I can also then set some default or safe value.

Thanks

I agree with you. Its very useful comment for me.

Thanks a lot

rdrast said:

...Overflow does not cause a major fault at end-of-scan as it did in the PLC/SLC series....

Click to expand...

I think this has been changed some time back. I distinctly remember fixing a program with a divide by zero problem and a negative timer preset that did cause a C-Logix CPU fault.

It's been about 3 years ago and I don't recall the firmware rev in use on that system...

Generally, though, I agree about not habitually unlatching fault bits...As a temporary fix, I copy them to a user variable and unlatch them to keep a system up and running until I can isolate the cause...

Divide by zero will not cause a major fault on any Logix platform... A negative timer preset though will most definately.

Common programming errors that will hard fault (STOP) a Logix processor:
Negative timer preset
Invalid update time in a PID instruction
Missing target for a JSR
Missing lable for a JMP

There are others, but those are common.

I've never had a hard-fault due to any math overflow/underflow. In some cases, Over/Underflow is unavoidable (trying to sign extend a 24 bit value into 32 bits, truncating DINT's to INT's, etc).

I'm not sure if there was ever an issue in the way-back machine, but I've only been actively using the logix platform since firmware 9 or 10.

OkiePC said:

I think this has been changed some time back. I distinctly remember fixing a program with a divide by zero problem and a negative timer preset that did cause a C-Logix CPU fault.

Click to expand...

Thanks for the clarification...

I am pretty sure the firmware was at least as new as 9 or 10, so I guess I went overboard putting "NEQ x 0" ahead of the DIV instructions, and it was the timer preset that was derived from an analog potentiometer input that was the only cause of a major fault...The original programmer was subtracting an offset from it and did not consider what might happen if they turned it all the way down...