Timers within RS Logix

bmw_apprentice · Mar 10, 2008

i have had a fair amount of experience with RS Logix and i have never seen the TT bit of a timer used before. could someone explain what this is and where it could be used. also any other interesting pieces of info about timers would be handy.

Cheers

Ken Moore · Mar 10, 2008

Example:

jtn · Mar 10, 2008

I use it for two things:
1. Once an event happens you want the timer to time out even if the initiating event goes away. You seal the rung in with the .TT bit.
2. Something needs to run for a set amount of time. You enable the timer and energize the output coil using the .TT bit.

bmw_apprentice · Mar 10, 2008

ah i see. so it is different to the EN bit as it goes off when the timer is complete?

Ron Beaufort · Mar 10, 2008

the "rule" is as follows:

if the timer IS enabled - and the timer is NOT done - THEN the TT bit will have a status of ONE ...

OkiePC · Mar 10, 2008

Ron beat me to it, but I was going to say that is is the logical equivalent of enabled and NOT done, and many programmers use the XIC EN in series with XIO DN to do the exact same thing.

downey18 · Mar 10, 2008

Saying the name of it always helps me remember: Timer Timing bit. On when the timer is timing.

rlmts · Mar 10, 2008

Monostable Timer

I don't wish to hijack this thread, but it seems appropriate to post my question here.

I would like to simulate a Telemec PL7-2 Monostable instruction in RSlogix (ML1500)

The operation of the Telemec is shown here....

And what I thought may be an equivalent in AB....

Using the .TT output to simulate thr R: (running) output of the Telemec Monostable.

Of course, the AB time counts up, not down like the Telemec, but that's not a concern.

But I think it's flawed... the Telemec one keeps the R: output high for as long as the S: input has a new change of state (OFF to ON) before the preset has timed out.

I think my AB solution will have it's TT equivalent go OFF for that one scan when the [ONS] pulses it to prevent it from timing out.

What do you think?

mellis · Mar 10, 2008

Try this one instead...

Change the TOF to a TON.
Add an OTL B3/0 in parallel with the TON.
Second rung is XIC T14:1.DN OTU B3/0.

OkiePC · Mar 10, 2008

Using T4:0 for the examples:

Yes, you want the TON and then you will need to subtract T4:0.ACC from T4:0.PRE to obtain the equivalent of "Mi.V" (Clamp it above 0 since overrun is possible in AB)...

That should give you the same timing diagram as the original...

BUT, what is the difference between a "hot start" and a "cold start"? Read the special cases at the end of your jpg.

That little detail may call for an RTO to exactly match depending on other conditions. If you need the retentive feature, use an RTO, and program a reset for it to give it TON behavior.

Bottom line: The TOF doesn't count down, it begins counting up when the rung goes false, and resets when the rung goes true.

An A/B TON T4:0/TT bit would be equivalent to the "R" running bit and the "S" start conditions would be the same as T4:0/EN

rlmts · Mar 10, 2008

Hi Mellis,
I assume you mean without the [ONS]
But even then, the 'Monostable' will not give it's fixed output pulse of 'preset' duration if the input is on for a shorter period than the 'preset' time?

rlmts · Mar 10, 2008

Hi Paul,

I am still not convinced?

Note the timing diagram...

Output R: will always give a fixed pulse of a 'preset' time duration whether or not the input S: duration is shorter or longer than the preset value.

And, should the S: input go untrue, then true again before the 'fixed' R: output duration is complete, it will add a another 'preset' duration to the existing output pulse, thus extending it until a complete 'preset' time has elapsed since the last false to true transition on the input S: ...... I think!

Rich

OkiePC · Mar 10, 2008

Hi!

EDIT: Yes, you are correct. To duplicate that, you will need to branch around the input conditions to keep the TON timing.

I read the Output R as a bit address that will only be "high" when timing is actually occurring, even if interrupted and restarted before the timing is complete.
Looking at the circled portion of the timing diagram again: S goes false for a period during which the timer keeps counting.

Mi.V ramps from Mi.P to zero in a count down fashion.

So you can seal in the timer with the EN bit and reset it on the oneshot of the S conditions.

Maybe the TOF is the way to go, just invert the ACC value to get the countdown direction...

Sorry for misleading you, Rich!

rlmts · Mar 10, 2008

EDIT HERE TOO! messages keep crossing in the post!
-----------------------------------------------------
Hi Paul,

I understand the maths to get the equivalent count down, but I can't see how the previous description of a rung using a TON can simulate this R: output, particularly in the portion of the timing diagram you have highlighted? (where R: can stay high forever, if S: keeps going FALSE to TRUE before the preset time has elapsed)

Rich
-----------------------------------------------------
EDIT (Off to bed now, will study again in the morning)

OkiePC · Mar 10, 2008

Yes, I have looked again, the rising edge of S is what you want to initiate timing to start.

In a TOF, you may need to invert the condition ahead of the OSR since timing will begin when the rung goes false. However, doing that may require that the timer is programmatically initialized on first scan.

I still lean toward using a TON with a seal in branch, followed by a SUBtract to get the countdown value, and immediately followed by a rung to clear the result when the timer is not timing to prevent a negative count-down value.

That way you get the timer started on the exact same scan as opposed to waiting for the next scan with the OSR->TOF.

Also, TON timers are generally easier to follow logically for most people...I use the TOF sparingly, only when the equivalent TON logic gets too ugly.

Timers within RS Logix

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