mitsubishi Q06H - Bit is set, logic says it should not be

ason

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Oct 2005
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Hello
Im at a costumer and help them to solve some problems
They have a Melsec Q06H

In this program there is very difficult to read what is happning because the guy that dids this liked very much to build the hole program with Set/Reset and without comments
Looks like this al the way, i have started to make comments

ex.jpg

So first i did change a s/r with a coil,
But my problem is that this coil is set even when it shouldnt be,
The adress was first L723, the i change it to M723

m723.jpg

And i only write to it in one place, and read it in another place

m723_browse.jpg

I have rebuild all, rest latch, whitout luck..

What can it be?
 
It works for me,
Here we have them again..

attachment.php


attachment.php


attachment.php
 
Must be a "browser" thing. I am able to your first images in firefox. Can't view your second post in either though.

Wow, that is pretty ugly logic.

I guess start with the silly ones first:
1) Make certain you are actually viewing "online"
2) Make certain the subroutine you are viewing is actually executing.
3) Make cure there are no "block" copies/writes to a range of memory that includes that bit.
4) Possibly your contacts used for conditions come on and off every scan and do so fast enough that you cant see them.


As a "trap", add an ADD block and create a counter in Parallel with your M723 and see if it counts up.
 
Now i have made a new address in "Header"
And same problem, and my count up, works as it should.

What is happning here :eek:

add.jpg
 
What is the PLS_M function block ahead of the ADD_E for? I was interested to see the behavior of the ADD_E instruction tied directly in parallel to see if it would count indefinitely.

It would seem that the most likely explanation for what you are seeing is that for some reason it does not execute the coil instruction unless the logic ahead of it is true. Maybe in FBD the coil instruction does not operate the same way it normally would in a network in a standard LD diagram? Possibly then it basically acts just like a set coil in FBD.
I'm just speculating. You might want to look at the help file and see how the coil instruction is defined when used in FBD, and review what rules FBD operates by. I have only ever used FBD for processing math, not making a lot of logic decisions.
 
In GXIEC temp variables use actual memory addresses, the range is fixed at project creation however can be changed check that the variables used are not in that range.
Also check if any bits/words are not indirectly set/reset i.e. the use of index registers as these will not show in cross reference.
 
Im not on site anymore, but can check somethings in next week,

What is the PLS_M function block ahead of the ADD_E for? I was interested to see the behavior of the ADD_E instruction tied directly in parallel to see if it would count indefinitely.

I put the PLS there to see if condition goes on/off
i can try to remove it next time to see what happends
this logic is old and only thing i did was to change it to a OUT


In GXIEC temp variables use actual memory addresses, the range is fixed at project creation however can be changed check that the variables used are not in that range.
Also check if any bits/words are not indirectly set/reset i.e. the use of index registers as these will not show in cross reference.

there is no need to use a index register in this process,

something is realy strange,
i was going to put in 1 more PID loop,
and then in got system error 4100,
i have bean in contact with the support, and they have run this project on there PLC and they didnt get error,
We also used teamviewer with the support and they cant find what is happning

i have format main memory, and the memory card that the file-register is on.
and download everything and nothing changes.

Support says that we need to test change PLC,
That is my next step..
 

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