SLC 5/01 Timer
- Thread starter Gdsodrnk
- Start date
OkiePC
Lifetime Supporting Member
What file contains this timer rung (is it being scanned)?
Is it possible that the rung in conditions go false for just long enough to keep the timer reset, but not long enough for it be be detected and displayed on screen?
Is it possible that the rung in conditions go false for just long enough to keep the timer reset, but not long enough for it be be detected and displayed on screen?
Ron Beaufort
Lifetime Supporting Member
are you using the same address (for example T4:0) for both of the timer instructions? ... if so, the FALSE rung is resetting the timer ...
Eric Nelson
Lifetime Supporting Member + Moderator
It sounded to me like he has one timer, with parallel instructions enabling the timer, but he may very well be using two timers with the same address.
Any chance you're using a reset (RES) instruction with this timer? Is it ON?..
-Eric
That is your problem. You are enabling it with one rung, and the other is resetting it. You should not use the same timer address on different rungs.
If the rest of the logic is sound, just make a parallel input branch on the first rung, of the conditions that enable the timer on the second rung. Delete the second rung after doing so.
This will enable the timer when either of the conditionals is true.
Eric Nelson
Lifetime Supporting Member + Moderator
This is likely Gdsodrnk's issue, BUT, the "I have two rungs in the same ladder that can enable a timer" could also be interpreted as this:
| Condition A
|---] [---] [----------(A)
|
| Condition B
|---] [---] [----------(B)
|
| A +-----+
|---] [---+--------| TON |
| | +-----+
| B |
|---] [---+
-Eric
This is likely Gdsodrnk's issue, BUT, the "I have two rungs in the same ladder that can enable a timer" could also be interpreted as this:
| Condition A
|---] [---] [----------(A)
|
| Condition B
|---] [---] [----------(B)
|
| A +-----+
|---] [---+--------| TON |
| | +-----+
| B |
|---] [---+
-Eric
Very true... But he also said the .EN goes green, but the timer doesn't time... That would not happen with your construct.
There could, as already stated, be a RES somewhere that doesn't know about the 2 enabling conditions, but I doubt it... Who RESet's TONs ??
Then again, he didn't say they were TONs, they could be TOFs, in which case that would explain why they don't time when enabled.
Or they could be RTOs....
Or something could be writing to the Timer's .ACC register.
Or the timer could get enabled, and then other logic executes a JMP/LBL to take it out of the scan.
Or the timer could get enabled, and then other logic stops calling the subroutine file it is in.
Lots of things to consider... My money is on the duplicate use of the same timer on more than one rung
Eric Nelson
Lifetime Supporting Member + Moderator
Wow! I think you may have covered just about every possible cause for a 'non-timing' timer!...
-Eric
OkiePC
Lifetime Supporting Member
And, once again, I think Ron's meticulous reading and insight nailed it first; and I put odds at 42% that we may never know...
problem fixed
Thanks for all the replies. I ended up deleting all the permissives and adding them back in one at a time. One of them must have been cycling, but as stated in OkiePC's reply, it was to fast to be detected. I found the one that was resetting the timer, and made a programming change. Thanks for all the responses.
Gdsodrnk
"Gods Own Drunk"
Thanks for all the replies. I ended up deleting all the permissives and adding them back in one at a time. One of them must have been cycling, but as stated in OkiePC's reply, it was to fast to be detected. I found the one that was resetting the timer, and made a programming change. Thanks for all the responses.
Gdsodrnk
"Gods Own Drunk"
Ron Beaufort
Lifetime Supporting Member
well, if anybody's keeping score, it looks like Okie gets the point for this one ...
bernie_carlton
Lifetime Supporting Member + Moderator
The more that a PLC programmer knows about the underlying process, the less they are to bring up these problems. Ron has been great about trying to remove the 'smoke and mirrors' from the process. But it leaves the individual programmer the duty to 'think' about what they are doing.
I have come from a microprocessor programming background so little about the PLC setup has come as a surprise. But as fewer and fewer have had this background, it becomes even more difficult to explain the seeming 'quirks' of number storage and program scan activity.
I don't see a way around it. I encourage everyone to play with a low level microprocessor, programming in its actual assembly language environment, learning the low level processes, to gain an actual low level understanding and to BLOW AWAY the casual PLC newbie. You will quickly become 'THE PLC GURU' if you take a few weeks to gain a low level understanding.
That, and that alone, has been enough to set me apart as 'www.theplcguy.com'
I have come from a microprocessor programming background so little about the PLC setup has come as a surprise. But as fewer and fewer have had this background, it becomes even more difficult to explain the seeming 'quirks' of number storage and program scan activity.
I don't see a way around it. I encourage everyone to play with a low level microprocessor, programming in its actual assembly language environment, learning the low level processes, to gain an actual low level understanding and to BLOW AWAY the casual PLC newbie. You will quickly become 'THE PLC GURU' if you take a few weeks to gain a low level understanding.
That, and that alone, has been enough to set me apart as 'www.theplcguy.com'
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