Ladder Execution Order

I love your dedication to the answer!


Yes, you're spot on, I had a blank and wrote things backward. Test 1 is always going to be the slowest, and then Tests 2 and 3 will determine the answer to our question. If Test 2 takes longer than test 3, my theory is right. If test 2 and test 3 are identical, your theory is right.

Your results show test 2 and test 3 execute in the same time, so it would appear that you're absolutely correct, and on the Logix 500 platform, a branch will ignore any further branch logic once it encounters a false instruction, skipping straight to the next NXB or the output instructions. I've learned something!

I have a 5370 Compact Logix on the bench, so I'll fire that up and run the same tests, and report back!

Test platform: 1769-L16ER-BB1B, FW 29.11. One periodic task, 1000ms, priority 1. Automatic output processing disabled to reduce task overhead.

Perform GSV to get LocalDateTime at start of test logic and end of test logic, subtract end microseconds from start microseconds to determine scan microseconds.


Test 1 Logic: 1000 rungs with 10 XIC's on each, followed by an OTE. All XIC's except the last one on each rung are true
Test 1 Scan Time: 760-770 microseconds

Test 2 Logic: 1000 rungs with 10 XIC's on each, followed by an OTE. First XIC on each rung is false
Test 2 Scan Time: 670-680 microseconds

Test 3 Logic: 1000 rungs with a single, true XIC and a single OTE on each
Test 3 Scan Time: 290-300 microseconds

So there we have it folks. An SLC will skip to the next branch, or the output instructions on encountering a false condition, but a Compact Logix will execute every single instruction regardless of the preceding rung condition. However, instructions scanned with a false rung-in condition execute faster than those with a true rung-in condition.