Single-timer approach using .ACC: assumes symmetrical operation across directions; includes 3s delay/overlap with both directions red (shown).
Roughly the same number of instructions as OP (2-3doz), but provides separation of concerns:
Timing-related logic on rungs 0-2
Single timer with breakpoints, plus [N/S half-cycle] bit, means all timing requirements need be written once only (rung 2)
Light logic on rungs 3-6
Probably busier than it needs to be e.g. take my "Green or Yellow" bit. Please.
Intrinsically safe logic(?)
Opposite directions' Greens/Yellows dependent on [N/S half-cycle] bit
Red lights dependent on same-direction green and yellow only, not timing
Also, it has my favorite circuit, the flip-flop .
Caveats
It is unlikely that this is the the first instance of this approach
I thought this would be cleaner than the cascading timers of OP, and the separation of concerns does help, but in the end it's clarity is less than expected.
SQO-driven or similar would be much cleaner and is probably the best way.
This approach will probably not scale to more complex intersections e.g. turn arrows, sensors.
GRTs should compare against 299 and 2499, not 300 and 2500