S:24 register conversion

Hi all, I am back to another conversion and ran across S:24 being used 3 times in the SLC. Wanted to see if anyone has translated SLC to CompactLogix that used the S:24 register. As I understand it, this is just a different way to do indirect addressing. I've attached 3 photo's of the 3 rungs S:24 is being used. In Rung 0 I would assume I could simply change the MOV to the S:24 register to be a MOV N15:[N18:3] to N18:5? The same for Rung 11. But I am not sure what's going on in Rung 19. If I do it this way, will it translate ok?

Rung 19 is basically doing the same thing as rungs 10 and 11. They are just zeroing out N16 before they start.

You are correct about the alternate method of indexed addressing. In effect any address that starts with the "#" symbol is a "base plus offset" type of addressing, with the indicated address as the base and S:24 as the offset.

There are several instructions in the PLC5/SLC that are considered "file" instructions, FLL and COP for example. These instructions automatically control the S:24 register as they operate, which is why they require the "#" prefix.

Keith

Looks like rung 19 can be translated as MOV -1 N16:[n18:3]

It appears they are clearing 125 words then setting all the bits in one specific word at that indexed address.

kamenges said:

Rung 19 is basically doing the same thing as rungs 10 and 11. They are just zeroing out N16 before they start.

You are correct about the alternate method of indexed addressing. In effect any address that starts with the "#" symbol is a "base plus offset" type of addressing, with the indicated address as the base and S:24 as the offset.

There are several instructions in the PLC5/SLC that are considered "file" instructions, FLL and COP for example. These instructions automatically control the S:24 register as they operate, which is why they require the "#" prefix.

Keith

Click to expand...

That makes sense, thank you!

OkiePC said:

Looks like rung 19 can be translated as MOV -1 N16:[n18:3]

It appears they are clearing 125 words then setting all the bits in one specific word at that indexed address.

Click to expand...

I do see that now, thanks! I'll have to dig a little to see why they want to fill the one word. I assume that word becomes 0 after the FLL.

On Rung 19 the file fill zeroes out N16:0 through N16:124. Then we load our index register. Then we move -1 (sixteen "1"s) into one specific register (N16:104 as shown).

The gotcha with indexing is that if you are looking at the logic you sort of expect to see -1 appear in the destination of the MOV but it won't. It only shows the value in N16:0. With indirect addressing, it would show you the expected result in the destination.

Also a little indirect addressing trick not everyone knows....You can tell RSLogix to display the indirect value instead of the pointer address.

1. Right-click on an empty space in the ladder window and select Properties
2. Click the address Display tab
3. Check the box for Display Value for Indirect Address
4. Click OK

Now in your display, instead of seeing N16:[N18:3] you would see N16:[103]. Assuming N18:3 = 103. If you hover your cursor over the value in brackets it shows you the pointer address. That value updates dynamically too.

For someone troubleshooting, this makes much more sense.

OG

LOL. Just noticed my sig and Junker's sig. Not intentional but oh so appropriate

OG