AB PLC5 - same bit XIC/XIO on left & unlatched on right?

PaulKraemer

Member
Join Date
Jan 2005
Posts
24
Hi,

I am using an AB PLC5.



I have a rung with three branches on the right, so that it has three connections to the right (output) rail. The logic in each branch is as follows...



Top branch: If XIC B3:0/1 then latch B3:0/0

Middle branch: If XIO B3:0/1 then unlatch B3:0/0

Bottom branch: no matter what, unlatch B3:0/1



So, when this rung is processed, if B3:0/1 is set, I want B3:0/0 to be latched. If B3:0/1 is not set, I want B3:0/0 to be unlatched. No matter what happens, I want B3:0/1 to be unlatched before moving on to the next rung. I was just wondering if this is legal. It seems kind of weird that I use B3:0/1 both as an XIC and an XIO condition on the left, while using the same bit in an unlatch output command on the right.



For my logic to work, I have to be sure that the XIC and XIO conditions are evaluated before the unlatch output command is executed. Can anyone tell me if this will work?



Thanks,
Paul
 
What you have is a one-shot type logic. B3:0/0 will only be on for one scan and will always be unlatched on the next program scan. If this is what you are trying to do, it will work fine.
 
Ladder version for reference:

| B3:0/1 B3:0/0
|----] [---------------( L )
|
| B3:0/1 B3:0/0
|----]/[---------------( U )
|
| B3:0/1
|----------------------( U )


I'm assuming B3:0/1 is being acted upon earlier in the scan?

I don't see why you need the latch/unlatch. It looks like B3:0/0 will simply mirror the state of B3:0/1. IOW, I don't see how it would be any different than this:

| B3:0/1 B3:0/0
|----] [---------------( )
|
| B3:0/1
|----------------------( U )

šŸ»

-Eric
 
Your logic is legal, but could be hard to troubleshoot. Also, if you unconditionally unlatch b3/1, during the next scan it will unlatch b3/0. Is this what you want? What turns on B3/0?
 
Hey guys, thanks for your responses. I tried to simplify it a bit for my question, but it is actually more like this I've shown below. I have a fourth branch. B3:0/2 is latched when a momentary switch is triggered. When this happens, I only want the rung to be processed once, so I unlatch B3:0/2 on the bottom branch.


 
B3:0/2 B3:0/1 B3:0/0
------] [------------|----] [---------------( L )
|
| B3:0/1 B3:0/0

|----]/[---------------( U )
|
| B3:0/1
|----------------------( U )
|
| B3:0/2
|----------------------( U )



When B3:0/2 is latched, I want the above rung to latch or unlatch

B3:0/0 based on the current state of B3:0/1. Then I want both B3:0/1 and B3:0/2 to be unlatched to clear the slate for the

next time the momentary input switch is triggered.
I think this will work for me, as long as it is legal ladder logic. My concern is that the XIO/XIC for B3:0/1 has to be evaluated and used to set/reset B3:0/0 before B3:0/1 is unlatched.


Will this work? Is there a better way to go about this?


Thanks again,
Paul
 
sorry about the poorly spaced ladder logic

I just looked at my ladder diagram and it is not spaced properly. It looked fine when I previewed it. I guess I did it wrong. Is there a note somewhere on this forum about how to post ladder logic? It looks like you can read it if you put in spaces to make the vertical bars line up, but maybe I'll repost it if I can figure it out.
 
|..P.B..................Drive Jog
| B3:0/1... B3:0/2 ...B3:0/0
|----] [-----[ONS]-----( L )
|
|
|Drive Jog..P.B......Drive Jog
| B3:0/0 B3:0/1....... B3:0/0
|----] [----[/]--------( U )

This is an example of a jog circuit. Drive jogs till P.B. is released.


One Scan Logic...... One Scan Logic
| B3:0/0................ B3:0/0
|----] [-----------------( U )
|
| P.B............. One Scan Logic
| B3:0/1.. B3:0/2...... B3:0/0
|----] [----[ONS]--------( L )
|
| ... Other Rungs Of Code ....
|
| B3:0/0............... Counter
|----] [-----------------[CTU]
|

This is an example of the logic working for only one scan. In this example, the counter is incremented each time the P.B. is pressed. In this example, instead of a counter, it could be a reset or other type of logic that only needs to be performed for only one scan.

Let us know what exactly you are trying to do and we can help you.
 
Sounds like you're trying to make a flip/flop. Here's how I do it. Each time the button is pressed, the flip flop address changes states.

flip_flop.jpg
 
PaulKraemer said:
I just looked at my ladder diagram and it is not spaced properly. It looked fine when I previewed it. I guess I did it wrong. Is there a note somewhere on this forum about how to post ladder logic? It looks like you can read it if you put in spaces to make the vertical bars line up, but maybe I'll repost it if I can figure it out.

Paul, you need to enclose the ladder in the ladder tag.
See http://www.plctalk.net/qanda/misc.php?do=bbcode#ladder

Using the ladder tag, just as you would use a quote tag

Will produce this:

A C
---+---] [--------( )
|
|
| B D
+---] [--------( )



But if you dont use the ladder tag, you will get this:
A C
---+---] [--------( )
|
|
| B D
+---] [--------( )

because HTML truncates consecutive spaces into one space.

However, even if you do use the ladder tag, if you edit the post or quote a post, the spacing will get screwed up.
 
Last edited:
I agree with Okie, sounds like you are trying to make a flip flop. The code he posted is one of the most common ways of doing it. Here is a variant of that (exchange the OSR with an ONS for your PLC5 and/or if you are doing a ML1200/1500)

flipflop915.GIF



Another common way it so use a counter. Each time you press the button, the counter increments. In binary the least signficant bit changes state every time the number increments by one.
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1

So if you program the following rungs
XIC S:1/15 RES C5:0
XIC BUTTON CTU C5:0 0 0
XIC C5:0.ACC/0 OTE OUTPUT

Use whatever address you need for BUTTON and OUTPUT, then the first time you press BUTTON, OUTPUT will turn on, the next time you press BUTTON output will turn off.

Use whichever method is easiest for you to understand.
 
Last edited:

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