CLX PIDE Problem

[plcnovel]

Hi All

I am trying to use RSLOGIX5000 PIDE block, and my starting point is the example that had been given on PIDE White Paper document produced by Rockwell Automation. A document is attached showing the picture of PIDE setup. The problem i am having is when i connect the output of ESEL instruction back to CVPrevious parameter of both PIDEs, the software gives me error stating "PIDE & ESEL blocks are the part of unresolved loop. Resolve the loop by changing the data flow indicator of one wire in the loop" When i select one of these wires, and mark assume data available option, it works fine. My question is why Rockwell Automation white paper didn't mention data available option in their document? Because if you mark that option the two arrows come on one end of the wire?
Your help will be appreciated. Thanks

 

[ghettofreeryder]

right click the line, and there should be something referring to program flow, im not sure what i says, something like assume data available. You need to turn that on for both lines connecting to CVPrevious

 

[WillRyan]

This was a fix for me, thank you!