drbitboy
Lifetime Supporting Member
Hmm, my approach has problems
1) if the I/O and program scans are asynchronous: if a button becomes 1 after the first set of button tests, but before the second set (start/stop circuits), then that button press would not be recorded and future button presses would be disabled. This can be corrected with an input map, so the button discrete inputs are tested only once per scan.
2) A debounce (slug) circuit, with a seal-in, on each button might be needed, which could be integrated with the input map mentioned above. i.e.
... times 8.
This
1) if the I/O and program scans are asynchronous: if a button becomes 1 after the first set of button tests, but before the second set (start/stop circuits), then that button press would not be recorded and future button presses would be disabled. This can be corrected with an input map, so the button discrete inputs are tested only once per scan.
2) A debounce (slug) circuit, with a seal-in, on each button might be needed, which could be integrated with the input map mentioned above. i.e.
Code:
ton0.Q sto0
----] [---]/[----[MOV/ADD logic]---
ton0
btn0 [ TON ] sto0
--+--] [-----+-------[IN Q]---( )--
| | 100ms[PT ET]
| ton0.Q |
+---] [----+
Reset ton0
----] [------<RES>---This
- uses the rising edge of ton0.Q to react to only the first (debounced) press of each button.
- has the Reset discrete input reset all of the timers
- Would work in an AOI or FB
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