Question I was asked, where are these derived from

[Peter Nachtwey]

Bingo. Oh no!

Largest odd integer for a 32 bit IEEE 754 float? Hrm...
It should be a 24 bit mantissa, no? so 16777215?

You should have stopped think right here.

24 1s = 11111111 11111111 11111111B = 0FFFFFFH = 16777215

The floating point format is
SEEE EEEE EMMM MMMM MMMM MMMM MMMM MMMM

The sign is not part of the mantissa. The mantissa is 23 bits with the msb assumed to be a 1. The exponent indicates what the value of the msb is. Binary powers of two have only zeros in the mantissa bits

 

[Thomas Sullens]

What is the largest odd integer that can be represented in a 32 bit float?

Is it 4,294,967,295?
Peter i don`t understand your answer in the above post. It maybe to far over my head?

 

[Peter Nachtwey]

Rdrast got the right answer 16777215.

I should have said rdrast should have stopped thinking at this point.

Floating has a 23 bit mantissa but 24th bit is always assumed to be 1 so therefore it isn't shown. The mantissa is ALWAYs positive. One set the sign bit to get negative numbers.

It is important that these limits are known. For instance a float can't accumulate integers forever.

 

[kamenges]

The thing that always throws me is that the IEEE floating point exponent value of 127 is a decimal exponent of 0. So all zeros in the exponent and a 1 in the least significant bit of the mantissa gives you the smallest possible non-zero number. Not so strange when you consider that the CPU treats other number types the same way. It just throws me when I see it.Keith

 

[BobB]

The floating point format is
SEEE EEEE EMMM MMMM MMMM MMMM MMMM MMMM

The sign is not part of the mantissa. The mantissa is 23 bits with the msb assumed to be a 1. The exponent indicates what the value of the msb is.

First time I saw this format I was extracting the number from a device via Modbus RTU and the PLC did not handle IEEE 754 automatically. Turned into a nightmare with lots of code to get the right number. Did not know about the assumed 1 either. Several days later ............

Peter, I have not played around with 64 bit floating point yet - do you know what format the exponent and mantissa take for 64 bit please? May never need to use it but I am curious.

 

[Peter Nachtwey]

Certainly, it is my job to know.

Peter, I have not played around with 64 bit floating point yet - do you know what format the exponent and mantissa take for 64 bit please? May never need to use it but I am curious.

1 sign bit
11 exponent bits subtract 1023 to get the exponent
52 mantissa bits 2^53-1 is a big number

9007199254740991

Hell should freeze over before this number is exceeded, but our politicians are greedy little devils that love to spend other people's money.

I must keep track of the ranges in floating point. A single precision number will accurately let me keep track of positions down to 1 micron out to + or - 16 meters. Double precision would let me keep track of distances to the sun in resultions much finer than a micron.

google IEEE floating point

 

[rdrast]

I had a feeling the first was correct, but thinking of the leading 'phantom' 1 bit always throws me.
I guess I'll just have to go with the 'Trust your first instinct' more in the future

 

[ndzied1]

Just in case anyone wants 'proof' (at least of how a borland C compiler uses floating point numbers on a PC) :

http://www.plctalk.net/qanda/showpost.php?p=45320&postcount=11

 

[akreel]

Why 4, 8, 16, 32, 64, 128 bits etc?

Powers of 2 make sense in a binary system. You can get better utilization of the hardware. I think that's all there is to it, really. When you add length to a DIP IC you get two more pins, which is why we don't have 5, 7, 9 or 11 bit machines.

The question I have is why 12 bit? I think it may have something to do with available input pins on a 16 pin ADC. Since part of the system has this restriction, you design the rest around it.

AK

 

[Peter Nachtwey]

No, back then DEC ( Digital Equipment Corporation ) made the memory for the PDP8. It consisted of magnetic cores. There were no standard memory sizes. Now you would want to stick to standard memory sizes unless you wanted to design memories too.


Note we always left hand justify the bits to and from a analog device. A twelve bit analog device is connected to bits 15-4 and bits 0-3 would be tied low. The reason for this is that 12,14, and 16 bit devices all look the same and use the same scale factors and offsets. Only the resolution is different. We do the same with single turn resolvers. This way 16,14,12, and 10 bit resolvers look ( use the same scale factor and offset to convert to engineering units ) the same except for the resolution.

 

[monkeyhead]

Why 4, 8, 16, 32, 64, 128 bits etc?

Sadly, after going through all my computer design books, the only place I could find an explanation was Wikipedia.

Some of the crazy word lengths back in the old days were partially due to some computers using serial decimal instead of parallel binary.

The power of 2

Data values may occupy differing sizes of memory, because, for instance, some numbers need to be capable of having greater precision than others. The commonly used sizes are usually chosen to be a power of 2 multiple of the unit of address resolution (byte or word). This is convenient because converting the index of an item in an array into the address of the item then requires only a shift operation (which is just a conductor routing in hardware) rather than a multiplication. In some cases this relationship can also avoid the use of division operations. As a result, most modern computer designs have word sizes (and other operand sizes) that are a power of 2 times the size of a byte.

The article this qutoe comes from was Word(computer science) and can be found here:

http://en.wikipedia.org/wiki/Word_(computer_science)