SLC Major Error

allscott

Member
Join Date
Jul 2004
Posts
1,332
I just had a SLC 5/05 fault on a major error. The error code was 20H which according to the manual says "A minor error bit is set at the end of the scan. This recoverable error occurs at run time."

Can anyone tell me what this means or where to go to find more information on this fault?
 
Quite often, but not always, that's going to be a number going out of range. When I see that, I look at all of the N, F, C registers and see which ones are at the max/min limits...
 
In addition to OZEE's recommendations, check all DIV for a possible 'divide by zero'.

The 'minor error' bit is provided and can be tested after any math operation (at least that's the only ones I have seen which trigger it). Your code could then do something intelligent regarding the problem and reset the minor error bit. But if it's still on at the end of the scan it means you haven't dealt with it and the program may now be working with bad information. It's the default action to shut down.

Some (lazy?) programmers just unlatch the minor error bit at the endpoint of the scan masking a problem until something blows up. The minor error bit is giving a warning. Something is out of order and really needs to be treated. I've learned (after a few of these) to place test for a zero divisor before division instruction for example.
 
I'm not sure that I follow you guys. The math overflow bit was not set. If there was a problem with some math causing the fault would that bit not be set?

I should mention that this is system has only been in production for about a month so I'm definately not ruling out program gremlins.
 
Thanks Mickey and no problem Bernie. The strange thing is that none of the minor error bits seemed to be set unless I'm seeing things.

Thanks for the replies, I will look closer if it happens again.
 
Just happened again, 20h is the error code and none of the minor error bits are set.

This has got me baffled?
 
While I've never personally seen the 20H code with no Minor Error bits set, I've heard about instances where that was reported.

The capture mechanism we used was to add a trap after every JSR instruction:

XIC S:5/0 OTL B20:0/x , where x corresponds to JSR file number

When the fault occurs, one of the bits of B20:0 should be set, thereby telling you which subroutine to examine for math overflows.
 

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