STL Transfer Load instruction help.

[Tharon]

I'm using Step 7, and have a fairly simple question about the Transfer and Load commands.

L DB53.DBD52
T DB52.DBD136
T DB52.DBD164

Does this transfer the value of in DB53.DBD52 into both DB52.DBD136 and DB52.DBD164? Or does the ACCU empty when a transfer takes place and the next number in the stack get transfered?

 

[PeterW]

Yes, what actually happens is the LOAD instruction transfers the data from the target into the accumulator and the TRANSFER instruction transfers what is in the accumulator into the target.

A LOAD effects the contents of the accumulator and does not effect the contents of the target, the TRANSFER does not effect the accumulator, therefore the two transfers receieve what was loaded into the accumulator.

Status on-line and you will see the accumulator contents.

say DBD52 = 1234 5678 and the other 2 are zero.

------------ ACCU1 and ACCU2 = unknown

L DB53.DBD52 //ACCU1 and ACCU2 = 1234 5678 as does DBD52
T DB52.DBD136 //Now DBD136 also equals 1234 5678
T DB52.DBD164 //Now DBD164 also equals 1234 5678

 

[paraffin power]

say DBD52 = 1234 5678 and the other 2 are zero.

L DB53.DBD52 //ACCU1 and ACCU2 = 1234 5678 as does DBD52

Not Accu 2.

 

[L D[AR2P#0.0]]

If you want to find out the details of an instruction, click your mouse on the instruction in the block editor and press F1 to get the Siemens help. For example, see below for the load and transfer instructions for an S7-300 CPU with two accumulators.
(The 318 and the 400 series have 4 accumulators)

L <address> loads the addressed byte, word, or double word
into ACCU 1 after the old contents of ACCU 1 have been saved into ACCU 2,and ACCU 1 is reset to "0".
 
T <address> transfers (copies) the contents of ACCU 1 to the destination address
if the Master Control Relay is switched on (MCR = 1).
If MCR = 0, then the destination address is written with 0.
The number of bytes copied from ACCU 1 depends on the size expressed
in the destination address.
ACCU 1 also saves the data after the transfer procedure.
A transfer to the direct I/O area (memory type PQ) also transfers
the contents of ACCU 1 or "0" (if MCR=0) to the corresponding address
of the process image output table (memory type Q).
The instruction is executed without regard to, and without affecting, the status bits.

 

[Tharon]

Ok. It's been a while since I've dealt with Accumulators and Stacks and such. I was confused by the examples the help file showed:

T QB10 //Transfers contents of ACCU 1-L-L to output bye QB10.
T MW14 //Transfers contents of ACCU 1-L to memory word MW14.
T DBD2 //Transfers contents of ACCU 1 to data double word DBD2.

I don't really understand what the bolded part means.

 

[L D[AR2P#0.0]]

Accumulators are 32 bits wide.

1 - transfer all 32 bits
1-L - transfer lower 16 bits
1-L-L - transfer lower 8 bits

 

[Tharon]

Alright, thanks. For some reason I thought that the ACCU 1, 1-L, etc. was trying to show me a shift in the accumulator as it did more than one Transfer in a row...

I've got this program all figured out now (or, figured out well enough... I dislike troubleshooting commentless programs written in programming languages I'm not experienced in.) and was able to make my adjustments properly.