OK, I'll try and give an answer, but this answer is based on the way A-B timers work, viz...
Each time the rung containing the timer is scanned (and let's assume the rung is true), the processor compares the timer's internal time reference against the processor's "clock", and calculates how many accumulator time periods have passed (different processors have different timebases, 1mS (Logix5000), 10mS or 1S (PLC5), 1mS or 10mS or 1S (SLC).
So the processor does the maths, and then decides how much to add to the timer accumulator.
The timer's internal reference is then updated from the processor's clock ready for the next scan.
It then checks to see if the timer has "timed-out", i.e. the accumulator is greater than or eaqual to the preset, and if it is, the .DN bit is set, and the .TT bit is reset.
So, to answer the OP's question, worst-case scenario is that the timer is scanned, and it has just failed to meet the preset value, let's say it has 1mS left to run. So the processor goes off to scan the rest of the logic, and returns to the timer 1 scan later. The maths is done, the accumulator is updated by the time difference between the processor clock and the internal reference, and then it checks to see if the accumulator is greater than or equal to the preset, which it sees is so, and the .DN bit is set.
So the "timing error" is marginally short of 1x Scan Time.
Of course, this timing error is NOT consistent.
All of the above assumes that the timer instruction is scanned more frequently than the internal reference will allow.
The number of bits used for the timer's "internal reference", or timestamp, determines how frequently the timer needs to be scanned in order to maintain timing, without loss of synchronisation.
These bits are hidden away inside the unused bits of the memory word occupied by the control bits, .EN .TT & .DN. (This is still true in the case of Logix5000 processors, because the TIMER data-type must use 3 x 32-bit words of memory, even though it contains only 2 DINTs and 3 BOOLs).
If my memory serves me correctly, PLC3, PLC5 and SLC timers need to be scanned more frequently that 512mS, or time is "lost" because of the resolution of the internal reference. tomalbright's PLC3 timer problem is the result of "lost" time due to this.