I think you've got a lemon on your hands ...
Greetings Alaric,
this is an interesting problem ... I’ve only had an hour or so to look at it ... I’ll try to find time to dig deeper in the next day or so, but right now the bo$$ has work for me to do ... in the meantime, here is what I’ve come up with so far ...
PLEASE NOTE: these are PRELIMINARY results ... further research and experiments might change these ...
first of all, I fully agree with you ... this does NOT work correctly ... as for the biggest single issue: you hit the nail on the head with your statement:
when the selected PID is scanned ... false ... the Integral sum is cleared
I’ve paraphrased your statement slightly for clarity ... but the central idea that you raised is definitely on target ... specifically, in an SLC processor, when a PID instruction is scanned with FALSE logic, the Integral sum is cleared ... I have found that to be true in all cases that I’ve examined ...
and so ... this program DOES scan the controlling PID with FALSE logic ... which means that the controlling PID does indeed have its Integral term cleared ... then how in the heck is it going to be able to properly control the output? ... simple answer: this won’t work ...
but ... you mentioned that Allen-Bradley says “it works just fine” ... I’m ready to place a substantial wager (more than pocket change) that they are wrong ... and I’ll even let them hold the bet ...
my best guess (at the present) for the source of their confusion is this:
they had a program for this “Low Select PID” application which was originally written for the PLC-5 family of processors ... that particular program was tested and it DID work correctly ... they then copied and pasted the exact rung structure into a new program for an SLC processor ... they then changed the PLC-5 addresses to match the I/O for an SLC system ... so far so good ... unfortunately they didn’t notice that the PIDs act differently between the two platforms ...
specifically, in a PLC-5 system, scanning a PID with FALSE logic does NOT clear the Integral sum ... BUT ... in an SLC system, scanning a PID with FALSE logic DOES clear the Integral sum ... oops! ...
as I said, this is all just mere supposition at this point ... but it is one sequence of events that would provide a cause-and-effect relationship for what we're seeing here ...
I’ve got a hunch that if you can get in touch with the “right man” at Allen-Bradley and mention the “Copy-Paste-PLC-to-SLC” scenario that I’ve just raised, then you’ll probably get a much different answer ... (suggestion: give him a link to this thread) ... I’ve got a strong suspicion that their original “it works fine” answer was based on satisfactory results from a PLC-5 system ... and they don’t realize that their SLC program was never fully tested on a working system ...
continuing right along ... I’ve taken the original Allen-Bradley program that you posted and rearranged the structure ... the original program was written using the common “let’s-cram-everything-on-to-one-rung” approach ...
my version keeps the same execution sequence ... but allows much better rung comments ... note that reading this won’t help solve the problem ... I think that you already have a working solution in mind ... but having these comments available might help us if we have to continue this discussion ...
but please keep in mind that:
the program I’ve attached DOES NOT (I say again: DOES NOT!) attempt to “fix” the problem ... all I’ve done at this point is try to break the component steps into a more manageable format for discussion purposes ... I’m reasonably sure that my changes haven’t altered the operation of the program (for better or for worse) but I’ll warn you in advance that I was pretty sleepy while I worked on this ... and that will be the first excuse that I use if it turns out that I’ve dropped a stitch ...
an additional note ... I’m pretty sure that you’ve noticed this too, but the comment for rung 0000 in ladder file #5 of the original program mentions that the “manual mode” executions of the PIDs are to be done “ONCE” ... but ... there is nothing in the original program to “one-shot” this particular operation ... specifically, as currently written, this “manual mode” execution is going to happen each and every time that the PID ladder file is scanned ... now I don’t think that’s a part of your problem right now ... but it MIGHT become an issue once the dust has finally settled on the rest of this mess ...
finally (for now) ... if you really do need this “Low PID Select” function, I’d suggest that you proceed along these lines: try to find a similar program for the PLC-5 processor family ... if my suspicions are correct, then there’s probably such a program floating around out there someplace ... and chances are very good that it works perfectly ... so ... a plan of attack would be to closely examine the functionality of that PLC-5 program – and then build that same functionality into a program for an SLC ... if the differences between the two platforms are kept in mind, that shouldn’t be too hard to do ... but ... it won’t be just a simple “Copy-and-Paste” operation ... no matter how attractive that approach might seem to be at first glance ...
anyway ... I hope this helps ... I’ll keep working on this as time permits ... thanks for bringing it up for discussion ... stuff like this just makes my day – and sometimes a good portion of my night too ...
