A "simple" job

Hi

I have a "simple" job, there is giving me a little bit of trouble.
I have some inputs there is coming as 50 ms pulses, and we have to detect them, but only every second time the pulse is coming.

So the task is:
1) Pulse is coming = bit is set to 1
2) Pulse is coming = bit is set to 0
3) Pulse is coming = bit is set to 1
4) Pulse is coming = bit is set to 0
and so on

PLC : Rockwell FlexLogix
Software : RSLogix 5000

Have someone a solution for this ?

Do a search for "flip-flop" on this site.

I'm not 100% sure that I understand the question, but maybe this is what you're looking for ...



like Rick says, we usually call this a "flip-flop" arrangement ... according to your profile you're not a "student" - but this is one of the assignments that many instructors use for tormenting/educating their PLC students ... hope it helps ...

The CLX is definitely fast enough to detect 50mSec pulses, but there is a caveat: The controllogix PLC does not have an implicit update of the IO on every scan that the PLC executes. Rather your IO is configured with an update time and the IO image table for the modules is updated at this rate, asynchronously with the PLC scan. If you are missing every other input then I suspect that the module update rate needs to be increased (by making the update time smaller). If you will double click the io module in the hardware setup tree you can access a dialogue box to increase the update time.

I don't know if the speed would be an issue here but I usually use an XOR to do a flip-flop.



The word in Source B should be comprised of 1's on the bits you want toggled, and 0's on the bits you want ignored. My example will toggle bit 1 and leave the rest alone.

excellent point, kolyur ...

actually that's the way I personally prefer it too - as in this post from several years ago ...

but since most people (maintenance technicians especially) don't work with the XOR instruction that often, I usually just "go with the flow" and use the more common method that I posted above ...

but it's nice to know that I'm not totally alone in my programming preferences ... (although quite often I am) ...

Heh heh, yes I have also experienced gripes from our maintenance guys when they try to decode some of my logic. But at least one of them is a "convert" thanks to me and now uses XORs for his flip-flops as well.

When writing ladder logic I often find myself spending hours and hours figuring out how to complete the program using the absolute least number of rungs (which often means many many branches on a rung--I'm not proud of that).

Another very simple way to make a flip flop is with a counter using the .acc/0 bit. The /0 bit will change state each time the counter upcounts, set for odd numbers, clear for even numbers. Roll over is not an issue.

   INPUT

-----] [----------+-CTU-------+

                  |      C5:0 |

                  |          0|

                  |           |

                  +-----------+

 

   C5:0.ACC/0          OUTPUT

-----] [-----------------( )---

Thanks

Thanks for your answers.

The problem is also that the pulses are coming in “trains” of difference length, so we can see if we are missing pulses.

I have some code like the one Ron showed in thread #3, but it miss pulses time to time.
(and yes Ron I am not a “student”, I have bee working with PLC systems since 1984)

Alaric’s proposal in thread #4 to look at the update time for the module, gave a more stabile “catch” of pulses.

With the change of update time the system are now stabile and I will let it run for the night and see result tomorrow.

I will return tomorrow if there is more problems.