AOI or program help creation

Is it a 1734 with the 5069?

5069 has no native I/O link capability. At least of what I am aware of.

If it's just your brain...

This is just a homework assignment ?.
The CPU comm though Ethernet/IP with the IO Link Master and after that I can see all the IO link master "registers". It doesn't have to be a 1734 a simple connection from the ethernet/IP port of the io/link (M12 connector) to one of the ports E1 or E2 of the 5069 (RJ45) will do the job perfectly fine.

No homework. I am creating this AOI for my work. We have started using this IO link masters recently and the IO link slave (48 valves device) quite often so I want to create it in order that in the future it will be more easy for me or whoever comes after me to use the master and the slave with the AOI
 
The CPU comm though Ethernet/IP with the IO Link Master and after that I can see all the IO link master "registers". It doesn't have to be a 1734 a simple connection from the ethernet/IP port of the io/link (M12 connector) to one of the ports E1 or E2 of the 5069 (RJ45) will do the job perfectly fine.

No homework. I am creating this AOI for my work. We have started using this IO link masters recently and the IO link slave (48 valves device) quite often so I want to create it in order that in the future it will be more easy for me or whoever comes after me to use the master and the slave with the AOI
I think that is a decent approach. See how it works is all.
 
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EQU port 1 MOV 23 word0index MOV 24 word2index MOV 25 word4index

XIC openbit GRT howmany 0 OTE IO_Link_Test:O1.Data[word0index].0

...

XIC openbit GRT howmany 47 OTE IO_Link_Test:O1.Data[word4index].15
 
Probably put the following at the start to protect against an invalid value for the port input by exiting the AOI before any OTEs are evaluated:

LIM 5 port 0 RET

(Assumes valid port values are 1, 2, 3, or 4)
 
Probably put the following at the start to protect against an invalid value for the port input by exiting the AOI before any OTEs are evaluated:

LIM 5 port 0 RET

(Assumes valid port values are 1, 2, 3, or 4)
I'll try it as soon as I get to work Monday(cause know I don't have the tool to unfortunately) thank you so much man for the time and effort you give into this problem of mine
I really appreciate it !!!!

I hope u have a great day, all of you :)
 
Instead of four branches with EQU instructions on every one of the 48 rungs, which would require coding 192 EQUs, why not use only four rungs, one for each port, that write the indices of the three array elements to AOI-local (-internal) INTs, and then each output valve rung can use no EQUs and a single OTE array[indexN].bitN with no branches. The the 48 (not 192!) OTEs will only write to the current one port's words.

Or read the state of the word, mask the bits he wants to touch on and write the whole word again. Still possible to cause him grief, but very common in microcontrollers.
 
Or read the state of the word, mask the bits he wants to touch on and write the whole word again. Still possible to cause him grief, but very common in microcontrollers.
Actually this is better, because the masking instructions, AND and OR, are like the OTL and OTUs, plus they can set and reset sixteen bits at a time. The bit-assignment part of the AOI boils down to three rungs and twelve branches instead of forty-eight rungs and one-hundred ninety-two branches. Use my indexing approach to reduce that by another factor of three.

The only downside, as noted by @cardosocea, would be clarity for someone diagnosing an issue (e.g. failed output channel).
 
Actually this is better, because the masking instructions, AND and OR, are like the OTL and OTUs, plus they can set and reset sixteen bits at a time. The bit-assignment part of the AOI boils down to three rungs and twelve branches instead of forty-eight rungs and one-hundred ninety-two branches. Use my indexing approach to reduce that by another factor of three.

The only downside, as noted by @cardosocea, would be clarity for someone diagnosing an issue (e.g. failed output channel).
Thank you so much guys, first of all I'll try will the creation of local(INT) tags and MOV them as u said cause I tried the mask thing before writing here but I think, sadly it was beyond my capabilities

But either way you've been really helpful @drbitboy , @cardosocea and I thank you both so much :)
 
I think what you are trying to say is that you want to selectively be able to write to certain data points (configured), but not all of them so other code segments can update those points. I don't know how to do that in Rockwell code, but in the Schneider PLC's, you would use any block with an Enable pin wired to logic that would update the point. This allows writing of the same point from multiple locations, but only the code you have enabled will update it. The order of execution here would matter otherwise, as multiple writes would update over one another potentially, and you are trying to avoid this.

Is that your objective?
 
I think what you are trying to say is that you want to selectively be able to write to certain data points (configured), but not all of them so other code segments can update those points. I don't know how to do that in Rockwell code, but in the Schneider PLC's, you would use any block with an Enable pin wired to logic that would update the point. This allows writing of the same point from multiple locations, but only the code you have enabled will update it. The order of execution here would matter otherwise, as multiple writes would update over one another potentially, and you are trying to avoid this.

Is that your objective?
Yes, that is basically what I want to do and for now I am going with the solution @drbitboy gave. But yeah, never though of a FBD solution after I am done with this I'll try maybe I can do it in FBD too

Thanks for the advice though, much appreciated !!
 

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